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66AK2H14: SPI setup sequence

Koichiro Tashiro
Mastermind 22945 points
Part Number: 66AK2H14


Hi,

My customer is evaluating EVMK2H and connecting their own board to SPI0 interface.

The external device is connected to CS1.
Customer reported strange behavior.

SPI0 initialization is done by gel file.
As you can see, SPI0_DAT1.CSNR=0x2 which corresponds to CS1.
After the initialization, SPI0_DAT0.TXDAT is written with 0xAA, but no signals (CLK, Data, CS1) are output.
Strangely enough, if 0x000000AA is written to SPI0_DAT1 after above steps, proper signals are output.

Customer tried the same steps with 16bits accesses and found writing 0x0000 to CSNR triggers proper signal output.
Please see attached excel sheet.

SPI.gel

SPI0_test.xlsx

Thanks and regards,
Koichiro Tashiro

  • 0
    TI__Guru**** 161600 points
    HI,

    As I see this is a problem with the formatting. See the description of SPIDAT0 register:
    "SPI transmit data (value = 0-FFFFh). When written, these bits will be copied to the shift register if it is empty. If the shift register is not empty, the TXBUF will hold the written values. SPIGCR1.ENABLE must be set to 1 before this register can be written to. Writing a 0 to the SPIGCR1.ENABLE forces the TXDATA[15:0] field to 0.

    Note: Irrespective of the character length, the transmit data should be right-justified before writing to SPIDAT0 register.

    Note: The default data format control register for SPIDAT0 is SPIFMT0. However, it is possible to reprogram the DFSEL field of SPIDAT1 before using SPIDAT0, to select a different SPIFMTn register."

    As I see the SPIFMT0 (offsett 0x50) has the value 0F000F10, which is not specified in the register description of the CHARLEN bit:
    "SPI data word length (value = 0-1Fh). Legal values are 2h (data word length = 2 bit) to 10h (data word length = 16). Illegal values, such as 0 or 1Fh are not detected and their effect is indeterminate."
    Also see the setting of bit 20 SHIFTDIR.

    Have them check the Processor SDK RTOS SPI examples and set the values as in the RTOS.

    Best Regards,
    Yordan
  • 0 in reply to Yordan Kovachev
    TI__Mastermind 22945 points

    Hi Yordan,

    Thanks for your reply.

    I think SPIFMT0 is correct. CHARLEN=0x10 means 16bits.
    SHIFTDIR=0 is also correct.

    Thanks and regards,
    Koichiro Tashiro

  • 0 in reply to Koichiro Tashiro
    TI__Guru**** 161600 points
    Ok, did they try the Processor SDK RTOS SPI example and compared the SPI settings there with what they've done in the GEL file for SPI0?
    Are there any differences in the register values?

    Best Regards,
    Yordan