RTOS/AM5728: How to change QSPI-Flash CLK with PROCESSOR-SDK-RTOS-AM57X

Matusan,

What is your customer trying to do with the QSPI clock ? 48 Mhz is the maximum QSPI clock setup supported on this device and as you determined changing the prescalar allows you to scale the clock down.

Let me try and explain the clock setup for QSPI on this device. The QSPI module is clocked using PER DPLL  as per the clock spec here

The QSPI GFCLK to the QSPI module is set to 48 MHz. This configuration is done using CM_L4PER2_QSPI_CLKCTRL_REG register. Since all of the SOC level clock configuration is done in the board library, please refer to the file idkAM574x_clock.c and check the following lines of code:

    CSL_FINST(l4PerCmReg->CM_L4PER2_QSPI_CLKCTRL_REG,
        L4PER_CM_CORE_COMPONENT_CM_L4PER2_QSPI_CLKCTRL_REG_MODULEMODE, ENABLED);

    while(CSL_L4PER_CM_CORE_COMPONENT_CM_L4PER2_QSPI_CLKCTRL_REG_IDLEST_FUNC !=
       CSL_FEXT(l4PerCmReg->CM_L4PER2_QSPI_CLKCTRL_REG,
        L4PER_CM_CORE_COMPONENT_CM_L4PER2_QSPI_CLKCTRL_REG_IDLEST));

    CSL_FINST(l4PerCmReg->CM_L4PER2_QSPI_CLKCTRL_REG,
        L4PER_CM_CORE_COMPONENT_CM_L4PER2_QSPI_CLKCTRL_REG_CLKSEL_DIV, DIV4);

    CSL_FINST(l4PerCmReg->CM_L4PER2_QSPI_CLKCTRL_REG,
        L4PER_CM_CORE_COMPONENT_CM_L4PER2_QSPI_CLKCTRL_REG_CLKSEL_SOURCE, SEL_PER_QSPI_CLK);

The following setting uses the 192 Mhz clock derived from PER DPLL and divides it by 4 to feed 48 Mhz clock to QSPI module. This is the default setup in both the GEL and the board library clock settings. This clocking configuration is then informed to the driver using the QSPI_HWAttr in SPI_soc.c file  found under 

pdk_am57xx_1_0_13\packages\ti\drv\spi\soc\am574x

The Prescalar that you see in the QSPI driver is in the module internal divider that allows you to derive clocks base on the input clock connect to the module. That is why when you set the prescalar to 1 (divide by (prescalar+1)) , you saw QSPI clock of 24Mhz.

In Summary the follow settings are used to setup the QSPI clock

1. Set PER DPLL and QSPI GFCLK in board library

2. Set the value in QSPI_HWAttr for driver to use

3. Modify Prescalar in driver if required.

Hope this helps.

Regards,

Rahul

PS: A good way to understand clocks on this device is the CLock tree tool that we provide on ti.com 

http://www.ti.com/tool/CLOCKTREETOOL