RTOS/PROCESSOR-SDK-AM437X: Re-open issue: PRP application fails

Marko Kastelic

Tool/software: TI-RTOS

Hi Garrett!

I need to re-open the issue related to

The latest findings were that the "race" was between HWI and Task.

Now when I add some other functionality issue came back to the surface.

What I see / what I believe what is going on is:
NC_NetStart -> NIMUInit -> MINU_ICSS_EmacInit -> ....... ..... -> NIMU_ICSS_open() HERE IS ISSUE!

   nCfg->nimuStat = (NIMU_IcssStatistics*)(mmAlloc(statsSize * numPorts));
    

    retVal = NIMU_ICSS_interruptInit(pi);
    if (retVal == 0)
    {
        /* Initialize packet structure for Rx */
        NIMU_ICSS_packetInit(nCfg->nimuPktRx);

        NIMU_ICSS_openPeripheral(pi);
        pi->TxFree = 1;
        EnableEMACInterrupts(pi);
    }
    return (retVal);

NIMU_ICSS_interruptInit() enable HWI. Rx packet buffer / pool is allocated in NIMU_ICSS_packetInit, right?
When NIMU_ICSS_interruptInit() is called, interrupt is triggered and post rxSemaphore. EmacOsRxTask then call ICSS_EmacPollPkt(). ICSS_EmacPollPkt() call -> NIMU_ICSS_interruptRx() -> NIMU_ICSS_rxServiceCheck().
In NIMU_ICSS_rxServiceCheck():
on line: 873 -> rxArgs.destAddress == 0!!!!!!

On line 874 jump on callBack -> RedRxPktGet but argument/address of destination address in NULL or some other undefined memory location, so on memcpy() it fail!

So why program fail, now I understand (Let me know if I'm wrong).

What I don't understand is why in NIMU_ICSS_open RX HWI enabled before "Initialize packet structure for Rx" function NIMU_ICSS_packetInit is called???
Function EnableEMACInterrupts is called after Rx buffer init, but how is possible that RX interrupt is allerady enabled???

Best Regards, Mare

over 6 years ago

0 Garrett Ding over 6 years ago

TI__Mastermind 43296 points

Mare,

When the rxArgs.destAddress = 0, is pPkt->BufferLen also equal to 0?

Have you tried to update the call flow like below?

/* Initialize packet structure for Rx */
NIMU_ICSS_packetInit(nCfg->nimuPktRx);
NIMU_ICSS_interruptInit(pi);
NIMU_ICSS_openPeripheral(pi);
pi->TxFree = 1;
EnableEMACInterrupts(pi);

NIMU_ICSS_interruptInit() creates HWI, and the interrupt is actually enabled in EnableEMACInterrupts() which is after NIMU_ICSS_packetInit(), so in theory, the default call flow should work with no race condition.

Regards,
Garrett

0 Marko Kastelic over 6 years ago in reply to Garrett Ding

Expert 1770 points

Hi Garrett,

as you can see in the upper post, all nimuPktRx members are 0.

Upper suggested code will probably work (I call function to disable interrupt link an rx inside the interrupt function).

Can you suggest me how to debug if any were in code is mistaken HWI enabled?

0 Garrett Ding over 6 years ago in reply to Marko Kastelic

TI__Mastermind 43296 points

Mare,

I think hwiParams.enableInt = FALSE; is missing in the NIMU_ICSS_interruptInit() before calling ICSS_EMAC_osalRegisterInterrupt() for linkIntrN and rxIntrN. Please confirm so we can commit this in next release.

Regards,
Garrett

0 Marko Kastelic over 6 years ago in reply to Garrett Ding

Expert 1770 points

Garrett,

hwiParams has no "enableInt" member in structure.

HwiP_Params hwiParams;

-->>

typedef struct HwiP_Params_s {
    char      *name;      /*!< Name of the clock instance. Memory must
                               persist for the life of the clock instance.
                               This can be used for debugging purposes, or
                               set to NULL if not needed. */
    uintptr_t  arg;       /*!< Argument passed into the Hwi function. */
    uint32_t   priority;  /*!< Device specific priority. */
    uint32_t   evtId;     /*!< Event Id associated */
#if defined (__ARM_ARCH_7A__)
    uint32_t   triggerSensitivity; /*!< Set an interrupt's trigger sensitivity for 
                                        ARM cortex-A Generic Interrupt Controller(GIC)
                                        v2.0 specific implementations as @ref OSAL_armGicTrigType_t 
                                    */
#endif
} HwiP_Params;

0 Garrett Ding over 6 years ago in reply to Marko Kastelic

TI__Mastermind 43296 points

Mare,

enableInt is in RTOS Hwi_Params but missing in the OSAL implementation, and the OSAL HwiP_create() has "hwiParams.enableInt = TRUE;" which seems to be the culprit.

You may try to add an NIMU_ICSS_interruptInit_v2() with hwiParams.enableInt = FALSE; to see if it helps.

software-dl.ti.com/.../Hwi.html

Regards,
Garrett

0 Marko Kastelic over 6 years ago in reply to Garrett Ding

Expert 1770 points

Garrett,

Check code..

/**
* @brief Opens and configures EMAC. Configures Interrupts
* @internal
* @param pi  NIMU_IcssPdInfo structure pointer.
*
* @retval Success(0) or failure(Error Codes defined)
*/
int32_t NIMU_ICSS_open(NIMU_IcssPdInfo *pi ); /* misra warning */
int32_t NIMU_ICSS_open(NIMU_IcssPdInfo *pi )
{
    int32_t retVal;
    NIMU_IcssDevice* nCfg;
    ICSS_EmacHandle handle = pi->nimuDrvHandle;
    nCfg = (NIMU_IcssDevice*)mmAlloc(sizeof(NIMU_IcssDevice));

    uint32_t statsSize = sizeof(NIMU_IcssStatistics);

    /* Initialize EMAC setup  */
    NIMU_ICSS_initConfig(nCfg,pi);
    uint8_t numPorts = 1U;

    ICSS_EmacRegisterHwIntRx(handle, (ICSS_EmacCallBack)NIMU_ICSS_interruptRx);

    if(ICSS_EMAC_MODE_SWITCH == ((ICSS_EmacObject*)(pi->nimuDrvHandle)->object)->emacInitcfg->portMask)
    {
        numPorts = 2U + 1U;
    }
    else
    {
        numPorts =1U + 1U;
    }
    nCfg->nimuStat = (NIMU_IcssStatistics*)(mmAlloc(statsSize * numPorts));
    

    retVal = NIMU_ICSS_interruptInit_v2(pi);
    if (retVal == 0)
    {
        /* Initialize packet structure for Rx */
        NIMU_ICSS_packetInit(nCfg->nimuPktRx);

        NIMU_ICSS_openPeripheral(pi);
        pi->TxFree = 1;
        EnableEMACInterrupts(pi);
    }
    return (retVal);
}

Implementation of NIMU_ICSS_interruptInit_v2()

#include <ti/sysbios/hal/Hwi.h>
/**
* @internal
* @brief Registering Interrupts and Enabling global interrupts
*
* @param pi Packet device information handle
*
* @retval none
*/
int32_t NIMU_ICSS_interruptInit_v2(NIMU_IcssPdInfo* pi); /* misra warning */
#if defined (__ARM_ARCH_7A__) || defined (__TI_ARM_V7M4__)
int32_t NIMU_ICSS_interruptInit_v2(NIMU_IcssPdInfo* pi)
{
    int32_t retVal = 0;
    Hwi_Handle rxHwiHandle;
    Hwi_Handle linkHwiHandle;
    static uint32_t cookie = 0;
    ICSS_EmacHandle icssEmacHandle = pi->nimuDrvHandle;
    int32_t linkIntrN = (int32_t)((((ICSS_EmacObject*)icssEmacHandle->object)->emacInitcfg)->linkIntNum);
    uint32_t rxIntrN = (((ICSS_EmacObject*)icssEmacHandle->object)->emacInitcfg)->rxIntNum;

    cookie = Hwi_disable();

    Hwi_Params hwiParams;

    Hwi_Params_init(&hwiParams);
#if defined (__ARM_ARCH_7A__) && defined (SOC_K2G)
    hwiParams.triggerSensitivity =2; /* use trigger type edge */
#endif

    hwiParams.arg = ((uintptr_t)icssEmacHandle);
    hwiParams.eventId = rxIntrN;
    hwiParams.priority = 15U;
    hwiParams.enableInt = FALSE;
    rxHwiHandle = Hwi_create((int32_t)rxIntrN, (Hwi_FuncPtr)ICSS_EmacRxInterruptHandler, &hwiParams, NULL);
    if (rxHwiHandle == NULL)
    {
        retVal = -1;
    }
    else
    {
        hwiParams.arg = (uintptr_t)icssEmacHandle;
        hwiParams.eventId = (uint32_t)linkIntrN;
        hwiParams.priority = 15U;
        hwiParams.enableInt = FALSE;
        linkHwiHandle = Hwi_create(linkIntrN, (Hwi_FuncPtr)ICSS_EmacLinkISR, &hwiParams, NULL);

        if (linkHwiHandle == NULL)
        {
            retVal = -1;
        }
       else
        {
            ((ICSS_EmacObject*)icssEmacHandle->object)->rxintHandle = rxHwiHandle;
            ((ICSS_EmacObject*)icssEmacHandle->object)->linkintHandle = linkHwiHandle;
        }
    }
    Hwi_restore(cookie);
    return (retVal);
}
#endif

It seem that this is resolved. Let me some time to test if the fault is fixed... or is there some other thing...

0 Marko Kastelic over 6 years ago in reply to Marko Kastelic

Expert 1770 points

I think this is fixed.

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RTOS/PROCESSOR-SDK-AM437X: Re-open issue: PRP application fails