hi, TI
I am wondering DDR3 design with 8GB of addressalbe memory space.
80000000 FFFFFFFF 8 00000000 8 7FFFFFFF 2G DDR3 EMIF data(2)
(2) The memory map only shows the default MPAX configuration of DDR3 memory space. For the extended DDR3 memory space access (up to 8GB), see the MPAX configuration details in C66x CorePac User's Guide and Multicore Shared Memory Controller (MSMC) for KeyStone Devices User's Guide in Section 10.3.
DDRD[31:0] / DDRA[15:0] / DDRCE[1:0] / DDRBA[2:0]
in datasheet
how to configurate DDR3 8GB?
row address 16bit / column address 11bit / 8bank / data bus 32bit = 4GB
4GB * chipset 2 = 8GB
Is the above mentioned correct?
But DDR3 EMIF data in datasheet has 2GB memory space.
the C6655 supports max 2GB memory space?
Please let me know how to configure DDR3 8GB
