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66AK2G12: QSPI interface NOR flash memory size

Part Number: 66AK2G12

In her answer Melissa said "Also, please note that the 66AK2G12 ROM boot doesn't support 4 byte addressing, so the initial boot image needs to be <16MB."

SPRUHY8H on page 290 tells, that one can set 32-bit Address width.

My question is can I use 128 MBytes QSPI Flash memory for booting?

  • Hi Mihail,

    I thinkg this should work. The rom code will not see the full 128MBytes, but it should boot as long as your boot image (MLO or sbl) are less than 16MB as stated by Melissa.

    Anyway, I have looped the design team to confirm my understanding.

    Best Regards,
    Yordan
  • Mihail,

    That is accurate, the ROM bootloader on K2G doesn`t support 4 byte addressing so typically would only load image that starts at base of the NOR flash upto 16 MB boundary. Having said that please note that most applications on multi-core device like K2G boot using dual stage boot as described here:
    software-dl.ti.com/.../index_Foundational_Components.html

    The ROM is only responsible for booting small secondary bootloader on onchip memory to get the primary boot master core running. The rest of the SOC initialization like setup up DDR, configuring clocks and wakeing up slave cores is then managed by the secondary boot loader.

    Once the secondary bootloader has started on the device, it is like any other user defined code and can be configured for 4 byte address so the full flash volume is available for application boot and to use post boot. The QSPI and flash driver that we provide in the SDK have been tested and designed to support the defualt 3 byte address and to switch to 4 byte addressing for address >16 MB.

    Hope this two stage boot mechanism is clear based on the description that I have provided above. Let me know if you have any further questions regarding this issue.

    Regards,
    Rahul