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help with choosing platform for HIL project



Hi everybody,

I have problem with choose platform for HIL project. My goal is get sample from ADC (ADC on SoC or by parallel interface), do some calculation and then send result to DAC (DAC on SoC or by parallel interface). It's look easy, but I need do it with 2-5Mhz. I tried do it on raspberry pi 3 A+ in bare metal, but I failed. I don't know what could I try next? Any proposition?

Best regards,

Marcin

  • Hello Martin,

    Thank you for your patience.

    As many of us were out of office recently from our Applications team on account of Spring holidays, we are catching up on many topics. Either myself or someone from my team will be following up with you by the end of the day US time tomorrow.
  • Hi Kevin,

    Thanks for answer. In which case I wait for next answer ;)

    Best regards,

    Marcin

  • Hi Marcin,

    Are you trying to update the DAC at 2-5M samples per second? Very few devices in the precision portfolio can update that fast - but is it is possible with the high-speed DACs. What resolution for the DAC are you looking for?

    Thanks,
    Paul
  • This is just idea, I need to know if this isn't unreal idea. My target in pseudocode:

    while(1)
    {
    int sample, result;
    sample = get_ADC_sample();
    result = do_some_algorithm(sample);
    send_to_DAC(result);
    }
    I think about system where I could sacrefice 1 core for only this loop. Additionaly I need 100-150 cycles for computing algorithm, that make 5Mhz*150 = 750Mhz a bit high but not imposible especially if I could use some DSP processor (like c6000 with I a bit familiar with it) where I could reduce cycle because of superscalar and vector instruction.
    I have most of problem with calculate cycles needed to read/write to RAM and peripherals that is crucial in this type of project.

    What you think about idea beaglebone x15 and some shield with external ADC and DAC?

    8 bit ADC and DAC is enought.

    Best regards,
    Marcin
  • Hi Marcin,

    There are a few limitations to consider:
    1. What is the sample rate of the ADC, it will need to be at least the 5Msps for you application.
    2. What is the sample rate of the DAC - most SPI based DACs are limited to about 1Msps, so you will need to look at a parallel input DAC.
    3. Does the microcontroller you are using have a DMA (direct memory access) for some of the hardware features. For example, some MCUs have a hardware state machine that can handle communication to the ADCs or DACs without monopolizing the processor.

    As you are looking at 8bit resolution, then I think is possible that the you could find a MCU with an integrated ADC and DAC, so you just need to check what their update rate limitation are. You could also consider an FPGA for this application, so you would just define a hardware interface that could talk to the ADC and DAC.

    Overall I think that this a feasible project, you just need to find a platform that can accommodate the high sample rate.

    Thanks,
    Paul
  • Hi Paul,

    Thanks for answer. I'm not familiar with FPGA technology, but look like this is a the best choice. New technology, new fun ;)

    Thanks guys for your advices!

    Best regards,

    Marcin