Hi,
currently we test DM8168 speed grade 4 (1.2 GHz)
Setup for this clock speed works fine for us if we use:
- define SG4_CLOCK_CONFIG in u-boot clocks_ti816x.h
- and defines SYSTEM_M3VPSS_FREQ, SYSTEM_M3VIDEO_FREQ, SYSTEM_DSP_FREQ in mcfw/interfaces/link_api/system_common.h
Our goal is to choose speed grade at runtime in u-boot.
So our questions:
Exists a hidden register containing the speed grad information?
Retrieving an u-boot environment parameter at this early initialiation stage seems not possible.
Has anybody experience regarding reconfiguration of main_pll_init_ti816x() and ddr_pll_init_ti816x() at a later stage?
Best regards Holger
