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Linux/AM3352: ETHERNET SOFT RESET ISSUE

Part Number: AM3352


Tool/software: Linux

Dear All,

We have made a customised board with am3352 processor along with LAN8710A Ethernet PHY IC.

We have connected the PHY IC to GMII2 pins of processor.

During POR the Ethernet phy is getting detected in U-Boot.

But after giving reset in U-Boot, the Ethernet interface are not getting detected.

we have checked the AD0 - 0v, AD1 - 5mV, AD2 - 0v respectively. 

The pin - Mux is given below,

static struct module_pin_mux mii1_pin_mux[] = {
{OFFSET(gpmc_wpn), MODE(1) | RXACTIVE | PULLUP_EN}, /* MII1_RXERR */
{OFFSET(gpmc_a0), MODE(1) | PULLDOWN_EN}, /* MII1_TXEN */
{OFFSET(gpmc_a1), MODE(1) | RXACTIVE | PULLUP_EN}, /* MII1_RXDV */
{OFFSET(gpmc_a2), MODE(1) | PULLDOWN_EN}, /* MII1_TXD3 */
{OFFSET(gpmc_a3), MODE(1) | PULLDOWN_EN}, /* MII1_TXD2 */
{OFFSET(gpmc_a4), MODE(1) | PULLDOWN_EN}, /* MII1_TXD1 */
{OFFSET(gpmc_a5), MODE(1) | PULLDOWN_EN}, /* MII1_TXD0 */
{OFFSET(gpmc_a6), MODE(1) | RXACTIVE | PULLUP_EN}, /* MII1_TXCLK */
{OFFSET(gpmc_a7), MODE(1) | RXACTIVE | PULLUP_EN}, /* MII1_RXCLK */
{OFFSET(gpmc_a8), MODE(1) | RXACTIVE | PULLUP_EN}, /* MII1_RXD3 */
{OFFSET(gpmc_a9), MODE(1) | RXACTIVE | PULLUP_EN}, /* MII1_RXD2 */
{OFFSET(gpmc_a10), MODE(1) | RXACTIVE | PULLUP_EN}, /* MII1_RXD1 */
{OFFSET(gpmc_a11), MODE(1) | RXACTIVE | PULLUP_EN}, /* MII1_RXD0 */
{OFFSET(mdio_data), MODE(0) | RXACTIVE | PULLUP_EN}, /* MDIO_DATA */
{OFFSET(mdio_clk), MODE(0) | PULLUP_EN}, /* MDIO_CLK */
{-1},
};

Question:

1. What can be the issue?

2. Whether any changes has to be done on U-Boot ?

Regards,

Avinash N

  • Hi,

    Please post what Linux version you are using. Also explain what do you mean by "giving reset in U-Boot"?
  • Hi,

    We are checking in U-Boot only . U-Boot version is 2017.01.

    Giving "reset" command in U-Boot.

    Regards,
    Avinash N

  • Hi,

    After the "reset" command and you halt the boot how are you determining that the PHY is not being detected? What are the network operations that you are performing? Please list them and the results seen on the console. Also please use mii dump to output the first two registers of the PHY and please post those results to this thread.

    Best Regards,
    Schuyler
  • Hi Schuyler,

    Board Debug message during POR, 

    U-Boot SPL (Mar 19 2019 - 19:00:08)
    ***Inside am33xx_spl_board_init
    MOORED BUOY MLO
    Trying to boot from MMC1
    ** First descriptor is NOT a primary desc on 1:1 **
    reading u-boot.img
    reading u-boot.img
    reading u-boot.img
    reading u-boot.img


    U-Boot 2017 (Mar 19 2019 - 19:00:08 +0530)

    CPU : AM3352
    MOORED BUOY
    DRAM: 1 GiB
    WARNING: Caches not enabled
    MMC: OMAP SD/MMC: 0, OMAP SD/MMC: 1
    ** First descriptor is NOT a primary desc on 1:1 **
    Net: Done.
    i = -1
    Detected PHY ID = 0x7c0f1
    Phy ID = 0x7C0F1
    cpsw connected to SMSC LAN8710/LAN8720
    cpsw, usb_ether
    Hit any key to stop autoboot: 0

    => mdio list

    cpsw:
    0 - SMSC LAN8710/LAN8720 <--> cpsw

    => mdio read 0 0
    Reading from bus cpsw
    PHY at address 0:
    0 - 0x3000


    => mdio read 0 1
    Reading from bus cpsw
    PHY at address 0:
    1 - 0x7809
    => mdio read 0 2


    Reading from bus cpsw
    PHY at address 0:
    2 - 0x7

    After giving reset command in u-boot,

    => reset
    resetting ...

    U-Boot SPL (Mar 19 2019 - 19:00:08)
    ***Inside am33xx_spl_board_init
    MOORED BUOY MLO
    Trying to boot from MMC1
    ** First descriptor is NOT a primary desc on 1:1 **
    reading u-boot.img
    reading u-boot.img
    reading u-boot.img
    reading u-boot.img


    U-Boot 2017 (Mar 19 2019 - 19:00:08 +0530)

    CPU : AM3352
    MOORED BUOY
    DRAM: 1 GiB
    WARNING: Caches not enabled
    MMC: OMAP SD/MMC: 0, OMAP SD/MMC: 1
    ** First descriptor is NOT a primary desc on 1:1 **
    Net: Done.

    i = -1
    i = 1
    i = 2
    i = 3
    i = 4

    cpsw (PHY): 0 *** PHY not found ***
    Could not get PHY for cpsw: addr 0
    cpsw, usb_ether
    Hit any key to stop autoboot: 0

    => mdio list
    cpsw:

    => mdio read 0 0
    Reading from bus cpsw
    PHY at address 0:
    Error

    => mdio read 0 1
    Reading from bus cpsw
    PHY at address 0:
    Error

  • Hi,
    Thanks for the data captures.

    Did you use a U-Boot from a TI SDK? Is this the full banner printed by U-Boot?

    U-Boot 2017 (Mar 19 2019 - 19:00:08 +0530)

    I tried this technique on a am335x based TI EVM and it worked, that hopefully at least proves that it at least should work. My advice for the moment is that it needs to be determined if the PHY is getting reset when the command is issued and if the MDIO traffic is still happening correctly.

    Could you please post the results of the following:
    setenv autoload n
    dhcp

    Based on what you have posted so far I expect this to fail but I would like to see what error messages are printed by u-boot.

    Best Regards,
    Schuyler
  • Hi,
    Since we have not heard back from we will assume for the time being that you were able to move past the issue that you were working on and close the thread.
    Best Regards,
    Schuyler