RTOS/TDA2PXEVM: MIPS vs FLOPS on EVE or DSP

Heechang Kim

Expert 2700 points

Part Number: TDA2PXEVM

Tool/software: TI-RTOS

Dear,

I'm estimating the core calculation.

I know the core clock and core load(%).

So, I can get the MIPS(cpu clock * cpu load).

In EVE or DSP, there are FPU?

FLOPS = cores * clock * FLOPs/cycle

I don't know FLOPs in EVE or DSP.

Best regards,

Heechang

over 6 years ago

0 Piyali Goswami over 6 years ago

TI__Mastermind 30245 points

Heechang,

This thread would be interesting for you e2e.ti.com/.../615108

Thanks and Regards,
Piyali

0 Heechang Kim over 6 years ago in reply to Piyali Goswami

Expert 2700 points

Hi,

There are A15, EVE and DSP.
How is the Cortex M4 for FLOPS/GHz or GMACs/GHz?

Best regards,
Heechang

0 Piyali Goswami over 6 years ago in reply to Heechang Kim

TI__Mastermind 30245 points

Hi Heechang,

The Cortex M4 in the TDA2px does not have a hardware FPU. So floating point operations are handled by the soft FPU libraries.
M4 is more suited for control operations. You should not plan for heavy pixel processing algorithms.

Thanks and Regards,
Piyali

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RTOS/TDA2PXEVM: MIPS vs FLOPS on EVE or DSP