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TMS320C5535: Multiple SPI Instances Bottleneck

Part Number: TMS320C5535

I'm developing on a TMS320C5535 using the XDS110 debugger, the C5000 chip support library, and Code Composer version:  8.3.0.00009. I have two SPI peripherals interfacing with the DSP processor and have verified that communication is successful when each peripheral is individually set up in different projects. Now I'm trying to combine both instances of the SPI peripherals within the same project. 

There are no examples on how to drive multiple SPI instances in the chip support library, so much of what I've learned has been through development experience, and trial & error with this processor.

As I develop the software for the device, I have found a significant bottleneck with the C5535. It seems that the C5535 cannot handle two SPI instances simultaneously without updating its internal registers using SPI_config().

For example, you would think that the following is valid:

// Config both instances only ONCE
SPI_config(hspi1, &spiCfg1);
SPI_config(hspi2, &spiCfg2);

// Use each instance without having to reconfigure every function call 
send_SPIdata(hspi1);
send_SPIdata(hspi2);
send_SPIdata(hspi1);
send_SPIdata(hspi2);

However, the code above will NOT work. Only the hspi2 instance will work because it was the most recently configured SPI handler.

If  you want to get both instances to work, you have to do the following:

// Need to use instance 1:
SPI_config(hspi1, &spiCfg1);
send_SPIdata(hspi1);

// Need to use instance 2:
SPI_config(hspi2, &spiCfg2);
send_SPIdata(hspi2);

// Need to use instance 1:
SPI_config(hspi1, &spiCfg1);
send_SPIdata(hspi1);

// Need to use instance 2:
SPI_config(hspi2, &spiCfg2);
send_SPIdata(hspi2);

Obviously, this is not ideal. I'm using each instance at a very high frequency and alternating between each instance for my application. Therefore, I have to constantly waste precious time and cycles to call SPI_config(), which adds up and introduces more latency into my system. 

Is this bottleneck inherent to the hardware in the C5535? Or could there potentially a bug in the SPI_config() that is causing this to happen? I have not been able to find a solution for this, so any guidance and advice would be greatly appreciated. 

Best, 

Eddie

  • Hi Eddie,

    The issue is caused by limitation of SPI hardware implementation in c55x architecture. CSNUM field of SPICMD2 Register specifies the active chip select for the transfer, value 0 to 3h. This is described in TMS320C5545/35/34/33/32 TRM section 8.4.6 at:
    www.ti.com/.../spruh87h.pdf
    You can find more details about chip select control in section 8.24.
    I would like to note that SPI_config routine in CSL SPI example is created to communicate with only one SPI instance. You can try to make your own 2 separate SPI config routines which make SPI configuration for each one of both SPI interfaces without setting chip select and when need to send SPI data to set only CSNUM field. I can not guarantee significant performance improvement because this is only a theoretical advise.

    Regards,
    Tsvetolin Shulev