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RTOS/AM5728: Warm reset except PCIe

Part Number: AM5728

Tool/software: TI-RTOS

Hello.

I'm using my custom board with AM5728.

My board is working as PCIe-EP device connected with windows PC.

Everything's working fine but reset.

Here is my system.

- Custom board with AM5728

- Working as PCIe EP Device

- PCIe driver on windows is working correct

- Windows can read/write DDR3 memory which is on my board.(working fine)

- My custom SBL initiaize PCIe things

And the problem is..."After I do global warm reset my board."

After I do global warm reset, PCIe link is okay. But the read data by PCIe is all 0xFF.

So, I have few questions.

I guess the problem comes because I re-initialize PCIe after warm reset. Is it correct?

I think there are 2 ways to avoid this problem....

Solution 1. I do warm reset except PCIe parts and my SBL skip PCIe initialize. is this correct way and possible?

                 If yes, How do I reset except PCIe part?

Solution 2. I guess there is a way to re-initialize PCIe with last link information with PC. Just like..."re-connection with PC"....Is it correct?

                If yes, What should I add or change in PCIe initialize sequence? my pcie initialize sequence is almost same as example in pdk.

Help me~~~~~Thank for you....

  • Hi,
    You are on the right track. It's not permitted for a PCIe endpoint to autonomously reset itself in normal operation. In this case, the PCIe host doesn't know that the EP has been reset and that all context between the two has been lost in the process. The PCIe function in AM57xx does not support hotplug (which is effectively what you are doing from the host's perspective (device appears, device disappears, device reappears), so there is no mechanism to re-establish the connection without a reset of the host as well.

    In summary, the AM57xx device (or SW) doesn't support what you are trying to do. My recommendation would be to avoid resetting the device after a successful upstream connection is made with a PCIe host.