hi,all
I get a problem in the DLCD module ,I set the DLCD mode to SRGB mode add a struct data in the variable which named "logicpd_encoder_configuration" in logicpd_encoder.c
.standards[3] = {
/* 0909170900 haohaodlam add TEST std */
.name = VID_ENC_STD_CIF, .std = 1,
.if_type = VID_ENC_IF_SRGB, .interlaced = 0,
.xres = 320,
.yres = 240,
.fps = {30, 1},
.left_margin = 195,
.right_margin = 78,
.upper_margin = 14,
.lower_margin = 8,
.hsync_len = 91,
.vsync_len = 3,
.flags = 1},
modify the function void davinci_enc_set_display_timing(struct vid_enc_mode_info *mode) void davinci_enc_set_display_timing(struct vid_enc_mode_info *mode) { dispc_reg_out(VENC_HSPLS, mode->hsync_len); dispc_reg_out(VENC_HSTART, mode->left_margin);
if(mode->if_type==VID_ENC_IF_SRGB){/* modify for SRGB mode */ dispc_reg_out(VENC_HVALID, (mode->xres*3));
dispc_reg_out(VENC_HINT,(mode->xres*3) + mode->left_margin + mode->right_margin - 1); } else{ dispc_reg_out(VENC_HVALID, mode->xres);
dispc_reg_out(VENC_HINT,mode->xres + mode->left_margin + mode->right_margin - 1); } dispc_reg_out(VENC_VSPLS, mode->vsync_len);
dispc_reg_out(VENC_VSTART, mode->upper_margin);
dispc_reg_out(VENC_VVALID, mode->yres);
dispc_reg_out(VENC_VINT, mode->yres + mode->upper_margin + mode->lower_margin); }; and other change for the VID_ENC_STD_CIF support but I got the 1/3 image in my LCD which is localed in the middle of the LCD why ? does I skip some configure ?