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TMS320C6654: Power Down Sequence

Ramgopal Divakar
Expert 1335 points

Part Number: TMS320C6654

Hello,

I am working on a C6654 design and was trying to use the output of DC-DC to enable the power good of CVDD, then CVDD1, then 1.8V, and finally 1.5V as a sequencing mechanism. My system doesn't have a power down or shut down mode so power will be turned off (Equivalent to catastrophic power loss). Since I will have a pull down on POR and the clock generator would that be okay? Otherwise how can I guarantee the power turns off in the opposite sequence as power on? How is it typically done?

Divakar

  • 0
    TI__Guru**** 161600 points
    Hi,

    The power down sequence happens when you have for example an OS running (or other software) and you issue a shutdown command to the processor, then it signals the PMIC and it shuts down the power supplies in sequence opposite to the power-up sequence.
    When you unplug the power supply (as you refer to it catastrophic power loss) all power supplies will be shut down simultaneously. This is not recommended, it is good to comply with the power sequencing, see the following thread which provides a lot of useful information:
    e2e.ti.com/.../593999

    Best Regards,
    Yordan