Part Number: AM3352
Tool/software: Linux
Hi,
I used uart5 as 485 mode, but rts-gpio has no waveform output.
gpio2_0 used as rts-gpio
the dts file attached.uart5_pins: pinmux_uart5_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x888, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_csn3.gpio2[0] rs485 io-gpio */
AM33XX_IOPAD(0x908, PIN_INPUT_PULLUP | MUX_MODE3) /* (H16) gmii1_col.uart5_rxd */
AM33XX_IOPAD(0x944, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* (H18) rmii1_refclk.uart5_txd */
>;
};
&uart5 {
pinctrl-names = "default";
pinctrl-0 = <&uart5_pins>;
status = "okay";
rts-gpio = <&gpio2 0 GPIO_ACTIVE_HIGH>;
rs485-rts-active-high;
rs485-rts-delay = <1 1>;
linux,rs485-enabled-at-boot-time;
};
&gpio2 {
pinctrl-names = "default";
pinctrl-0 = <&gpio2_pins_default>;
status = "okay";
ti,no-reset-on-init;
ti,no-idle-on-init;
};
/*
* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/dts-v1/;
#include "am33xx.dtsi"
#include <dt-bindings/interrupt-controller/irq.h>
/ {
model = "TI AM335x EVM";
compatible = "ti,am335x-evm", "ti,am33xx";
cpus {
cpu@0 {
cpu0-supply = <&vdd1_reg>;
};
};
memory@80000000 {
device_type = "memory";
reg = <0x80000000 0x10000000>; /* 256 MB */
};
chosen {
stdout-path = &uart2;
};
leds {
pinctrl-names = "default";
pinctrl-0 = <&user_leds_s0>;
compatible = "gpio-leds";
red_led {
label = "red";
gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
default-state = "off";
};
green_led {
label = "green";
gpios = <&gpio1 31 GPIO_ACTIVE_LOW>;
default-state = "off";
};
power_off {
label = "power";
gpios = <&gpio2 14 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
};
gpioi2c3: i2c-3 {
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&i2c3_gpio>;
compatible = "i2c-gpio";
gpios = <&gpio0 23 GPIO_ACTIVE_HIGH /* sda */
&gpio0 22 GPIO_ACTIVE_HIGH /* scl */
>;
i2c-gpio,scl-output-only;
i2c-gpio,delay-us = <2>; /* ~100 kHz */
status = "okay";
};
gpioi2c4: i2c-4 {
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&i2c4_gpio>;
compatible = "i2c-gpio";
gpios = <&gpio0 27 GPIO_ACTIVE_HIGH /* sda */
&gpio0 26 GPIO_ACTIVE_HIGH /* scl */
>;
i2c-gpio,scl-output-only;
i2c-gpio,delay-us = <2>; /* ~100 kHz */
status = "okay";
};
gpioi2c5: i2c-5 {
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&i2c5_gpio>;
compatible = "i2c-gpio";
gpios = <&gpio1 13 GPIO_ACTIVE_HIGH /* sda */
&gpio1 12 GPIO_ACTIVE_HIGH /* scl */
>;
i2c-gpio,scl-output-only;
i2c-gpio,delay-us = <2>; /* ~100 kHz */
status = "okay";
};
gpioi2c6: i2c-6 {
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&i2c6_gpio>;
compatible = "i2c-gpio";
gpios = <&gpio1 15 GPIO_ACTIVE_HIGH /* sda */
&gpio1 14 GPIO_ACTIVE_HIGH /* scl */
>;
i2c-gpio,scl-output-only;
i2c-gpio,delay-us = <2>; /* ~100 kHz */
status = "okay";
};
vbat: fixedregulator0 {
compatible = "regulator-fixed";
regulator-name = "vbat";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-boot-on;
};
lis3_reg: fixedregulator1 {
compatible = "regulator-fixed";
regulator-name = "lis3_reg";
regulator-boot-on;
};
pwm5: dmtimer-pwm@5 {
compatible = "ti,omap-dmtimer-pwm";
ti,timers = <&timer5>;
#pwm-cells = <3>;
pinctrl-names = "default";
pinctrl-0 = <&dmtimer5_pins>;
};
pwm6: dmtimer-pwm@6 {
compatible = "ti,omap-dmtimer-pwm";
ti,timers = <&timer6>;
#pwm-cells = <3>;
pinctrl-names = "default";
pinctrl-0 = <&dmtimer6_pins>;
};
pwm7: dmtimer-pwm@7 {
compatible = "ti,omap-dmtimer-pwm";
ti,timers = <&timer7>;
#pwm-cells = <3>;
pinctrl-names = "default";
pinctrl-0 = <&dmtimer7_pins>;
};
};
&timer5 {
clocks = <&sys_clkin_ck>;
};
&timer6 {
clocks = <&sys_clkin_ck>;
};
&timer7 {
clocks = <&sys_clkin_ck>;
};
&epwmss1 {
status = "okay";
ecap1: ecap@48302100 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&ecap1_pins>;
};
};
&epwmss2 {
status = "okay";
ecap2: ecap@48304100 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&ecap2_pins>;
};
};
&am33xx_pinmux {
pinctrl-names = "default";
uart0_pins: pinmux_uart0_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
>;
};
uart1_pins: pinmux_uart1_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x980, PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_rxd.uart1_rxd */
AM33XX_IOPAD(0x984, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_txd.uart1_txd */
>;
};
uart2_pins: pinmux_uart2_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x90c, PIN_INPUT_PULLUP | MUX_MODE6) /* (H17) gmii1_crs.uart2_rxd */
AM33XX_IOPAD(0x910, PIN_OUTPUT_PULLDOWN | MUX_MODE6) /* (J15) gmii1_rxer.uart2_txd */
>;
};
uart3_pins: pinmux_uart3_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x960, PIN_INPUT_PULLUP | MUX_MODE1) /* (C15) spi0_cs1.uart3_rxd */
AM33XX_IOPAD(0x964, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* (C18) eCAP0_in_PWM0_out.uart3_txd */
>;
};
uart4_pins: pinmux_uart4_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x968, PIN_INPUT_PULLUP | MUX_MODE1) /* (E18) uart0_ctsn.uart4_rxd */
AM33XX_IOPAD(0x96c, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* (E17) uart0_rtsn.uart4_txd */
>;
};
uart5_pins: pinmux_uart5_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x888, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_csn3.gpio2[0] rs485 io-gpio */
AM33XX_IOPAD(0x908, PIN_INPUT_PULLUP | MUX_MODE3) /* (H16) gmii1_col.uart5_rxd */
AM33XX_IOPAD(0x944, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* (H18) rmii1_refclk.uart5_txd */
>;
};
reset_clk_pins_default: reset_clk_pins_default {
pinctrl-single,pins = <
AM33XX_IOPAD(0x9b8, PIN_INPUT_PULLUP | MUX_MODE0) /* (A10) nRESETIN_OUT.nRESETIN_OUT */
AM33XX_IOPAD(0x9c0, PIN_INPUT_PULLUP | MUX_MODE0) /* (B18) nNMI.nNMI */
AM33XX_IOPAD(0x9b0, PIN_OUTPUT | MUX_MODE3) /* (A15) xdma_event_intr0.clkout1 */
>;
};
/* Optional sleep pin settings. Must manually enter values in the below skeleton. */
reset_clk_pins_sleep: reset_clk_pins_sleep {
pinctrl-single,pins = <
AM33XX_IOPAD(0x9b8, PIN_INPUT_PULLDOWN | MUX_MODE7) /* (A10) nRESETIN_OUT.nRESETIN_OUT */
AM33XX_IOPAD(0x9c0, PIN_INPUT_PULLDOWN | MUX_MODE7) /* (B18) nNMI.nNMI */
AM33XX_IOPAD(0x9b0, PIN_INPUT_PULLDOWN | MUX_MODE7) /* (A15) xdma_event_intr0.clkout1 */
>;
};
nandflash_pins_s0: nandflash_pins_s0 {
pinctrl-single,pins = <
AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */
AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */
AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */
AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */
AM33XX_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */
AM33XX_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */
AM33XX_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */
AM33XX_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */
AM33XX_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */
AM33XX_IOPAD(0x874, PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpio0_30 */
AM33XX_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */
AM33XX_IOPAD(0x890, PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */
AM33XX_IOPAD(0x894, PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */
AM33XX_IOPAD(0x898, PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */
AM33XX_IOPAD(0x89c, PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */
>;
};
ecap1_pins: ecap1_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x98c, PIN_INPUT | MUX_MODE3) /* pr1_ecap0_ecap_capin_apwm_o i2c0_scl speed1 */
>;
};
ecap2_pins: ecap2_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x99c, PIN_INPUT | MUX_MODE4) /* eCAP2_in_PWM2_out.eCAP2_in_PWM2_out mcasp0_ahclkr speed2 */
>;
};
cpsw_default: cpsw_default {
pinctrl-single,pins = <
/* Slave 1 */
AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txen.rgmii1_tctl */
AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mii1_rxdv.rgmii1_rctl */
AM33XX_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd3.rgmii1_td3 */
AM33XX_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd2.rgmii1_td2 */
AM33XX_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd1.rgmii1_td1 */
AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd0.rgmii1_td0 */
AM33XX_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mii1_txclk.rgmii1_tclk */
AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mii1_rxclk.rgmii1_rclk */
AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mii1_rxd3.rgmii1_rd3 */
AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mii1_rxd2.rgmii1_rd2 */
AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mii1_rxd1.rgmii1_rd1 */
AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mii1_rxd0.rgmii1_rd0 */
/* Slave 2 */
AM33XX_IOPAD(0x840, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* (R13) gpmc_a0.gmii2_txen */
AM33XX_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE1) /* (V14) gpmc_a1.gmii2_rxdv */
AM33XX_IOPAD(0x858, PIN_INPUT_PULLDOWN | MUX_MODE1) /* (U15) gpmc_a6.gmii2_txclk */
AM33XX_IOPAD(0x85c, PIN_INPUT_PULLDOWN | MUX_MODE1) /* (T15) gpmc_a7.gmii2_rxclk */
AM33XX_IOPAD(0x854, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* (V15) gpmc_a5.gmii2_txd0 */
AM33XX_IOPAD(0x850, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* (R14) gpmc_a4.gmii2_txd1 */
AM33XX_IOPAD(0x84c, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* (T14) gpmc_a3.gmii2_txd2 */
AM33XX_IOPAD(0x848, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* (U14) gpmc_a2.gmii2_txd3 */
AM33XX_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE1) /* (V17) gpmc_a11.gmii2_rxd0 */
AM33XX_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE1) /* (T16) gpmc_a10.gmii2_rxd1 */
AM33XX_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE1) /* (U16) gpmc_a9.gmii2_rxd2 */
AM33XX_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE1) /* (V16) gpmc_a8.gmii2_rxd3 */
>;
};
cpsw_sleep: cpsw_sleep {
pinctrl-single,pins = <
/* Slave 1 reset value */
AM33XX_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM33XX_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM33XX_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM33XX_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM33XX_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM33XX_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
/* Slave 2 reset value */
AM33XX_IOPAD(0x840, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM33XX_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM33XX_IOPAD(0x858, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM33XX_IOPAD(0x85c, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM33XX_IOPAD(0x854, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM33XX_IOPAD(0x850, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM33XX_IOPAD(0x84c, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM33XX_IOPAD(0x848, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM33XX_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM33XX_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM33XX_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM33XX_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE7)
>;
};
davinci_mdio_default: davinci_mdio_default {
pinctrl-single,pins = <
/* MDIO */
AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
>;
};
davinci_mdio_sleep: davinci_mdio_sleep {
pinctrl-single,pins = <
/* MDIO reset value */
AM33XX_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM33XX_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
>;
};
spi0_pins: pinmux_spi0_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x954, PIN_INPUT_PULLUP | MUX_MODE0) /* SPI0_MOSI - spi0_d0.spi0_d0 */
AM33XX_IOPAD(0x958, PIN_INPUT_PULLUP | MUX_MODE0) /* SPI0_MISO - spi0_d1.spi0_d1 */
AM33XX_IOPAD(0x950, PIN_INPUT_PULLUP | MUX_MODE0) /* SPI0_CLK - spi0_clk.spi0_clk */
AM33XX_IOPAD(0x95c, PIN_INPUT_PULLUP | MUX_MODE0) /* SPI0_CS0 (NBATTSS) - spi0_cs0.spi0_cs0 */
>;
};
user_leds_s0: user_leds_s0 {
pinctrl-single,pins = <
AM33XX_IOPAD(0x8c0, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* (T11) lcd_data8.gpio2[14] - power off */
AM33XX_IOPAD(0x884, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* (T11) gpmc_csn2.gpio1[31] - green led */
AM33XX_IOPAD(0x880, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* (U12) gpmc_csn1.gpio1[30] - red led */
>;
};
i2c3_gpio: i2c3_gpio {
pinctrl-single,pins = <
AM33XX_IOPAD(0x820, PIN_OUTPUT_PULLUP|MUX_MODE7) /* (T12) gpmc_ad8.gpio0[22] */
AM33XX_IOPAD(0x824, PIN_INPUT_PULLUP|MUX_MODE7) /* (R12) gpmc_ad9.gpio0[23] */
>;
};
i2c4_gpio: i2c4_gpio {
pinctrl-single,pins = <
AM33XX_IOPAD(0x828, PIN_OUTPUT_PULLUP|MUX_MODE7) /* (T12) gpmc_ad10.gpio0[26] */
AM33XX_IOPAD(0x82c, PIN_INPUT_PULLUP|MUX_MODE7) /* (R12) gpmc_ad11.gpio0[27] */
>;
};
i2c5_gpio: i2c5_gpio {
pinctrl-single,pins = <
AM33XX_IOPAD(0x830, PIN_OUTPUT_PULLUP|MUX_MODE7) /* (T12) gpmc_ad12.gpio1[12] */
AM33XX_IOPAD(0x834, PIN_INPUT_PULLUP|MUX_MODE7) /* (R12) gpmc_ad13.gpio1[13] */
>;
};
i2c6_gpio: i2c6_gpio {
pinctrl-single,pins = <
AM33XX_IOPAD(0x838, PIN_OUTPUT_PULLUP|MUX_MODE7) /* (T12) gpmc_ad14.gpio1[14] */
AM33XX_IOPAD(0x83c, PIN_INPUT_PULLUP|MUX_MODE7) /* (R12) gpmc_ad15.gpio1[15] */
>;
};
gpio0_pins_default: gpio0_pins_default {
pinctrl-single,pins = <
AM33XX_IOPAD(0x8d0, PIN_INPUT | MUX_MODE7) /* (V2) lcd_data12.gpio0[8] */
AM33XX_IOPAD(0x8d4, PIN_INPUT | MUX_MODE7) /* (V3) lcd_data13.gpio0[9] */
AM33XX_IOPAD(0x8d8, PIN_INPUT | MUX_MODE7) /* (V4) lcd_data14.gpio0[10] */
AM33XX_IOPAD(0x8dc, PIN_INPUT | MUX_MODE7) /* (T5) lcd_data15.gpio0[11] */
AM33XX_IOPAD(0xa1c, PIN_INPUT | MUX_MODE7) /* (F16) USB0_DRVVBUS.gpio0[18] */
>;
};
gpio1_pins_default: gpio1_pins_default {
pinctrl-single,pins = <
AM33XX_IOPAD(0x878, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* (U18) gpmc_be1n.gpio1[28] */
>;
};
gpio2_pins_default: gpio2_pins_default {
pinctrl-single,pins = <
AM33XX_IOPAD(0x88c, PIN_INPUT | MUX_MODE7) /* (V13) gpmc_clk.gpio2[1] */
AM33XX_IOPAD(0x8a0, PIN_INPUT | MUX_MODE7) /* (R1) lcd_data0.gpio2[6] */
AM33XX_IOPAD(0x8a4, PIN_INPUT | MUX_MODE7) /* (R2) lcd_data1.gpio2[7] */
AM33XX_IOPAD(0x8a8, PIN_INPUT | MUX_MODE7) /* (R3) lcd_data2.gpio2[8] */
AM33XX_IOPAD(0x8ac, PIN_INPUT | MUX_MODE7) /* (R4) lcd_data3.gpio2[9] */
AM33XX_IOPAD(0x8b0, PIN_INPUT | MUX_MODE7) /* (T1) lcd_data4.gpio2[10] */
AM33XX_IOPAD(0x8b4, PIN_INPUT | MUX_MODE7) /* (T2) lcd_data5.gpio2[11] */
AM33XX_IOPAD(0x8b8, PIN_INPUT | MUX_MODE7) /* (T3) lcd_data6.gpio2[12] */
AM33XX_IOPAD(0x8bc, PIN_INPUT | MUX_MODE7) /* (T4) lcd_data7.gpio2[13] */
AM33XX_IOPAD(0x8c4, PIN_INPUT | MUX_MODE7) /* (U2) lcd_data9.gpio2[15] */
AM33XX_IOPAD(0x8c8, PIN_INPUT | MUX_MODE7) /* (U3) lcd_data10.gpio2[16] */
AM33XX_IOPAD(0x8cc, PIN_INPUT | MUX_MODE7) /* (U4) lcd_data11.gpio2[17] */
AM33XX_IOPAD(0x8e0, PIN_OUTPUT_PULLUP | MUX_MODE7) /* (U5) lcd_vsync.gpio2[22] */
AM33XX_IOPAD(0x8e4, PIN_OUTPUT_PULLUP | MUX_MODE7) /* (R5) lcd_hsync.gpio2[23] */
AM33XX_IOPAD(0x8e8, PIN_OUTPUT_PULLUP | MUX_MODE7) /* (V5) lcd_pclk.gpio2[24] */
AM33XX_IOPAD(0x8ec, PIN_OUTPUT_PULLUP | MUX_MODE7) /* (R6) lcd_ac_bias_en.gpio2[25] */
>;
};
gpio3_pins_default: gpio3_pins_default {
pinctrl-single,pins = <
AM33XX_IOPAD(0x990, PIN_OUTPUT_PULLUP | MUX_MODE7) /* (A13) mcasp0_aclkx.gpio3[14] */
AM33XX_IOPAD(0x994, PIN_OUTPUT_PULLUP | MUX_MODE7) /* (B13) mcasp0_fsx.gpio3[15] */
AM33XX_IOPAD(0x998, PIN_OUTPUT_PULLUP | MUX_MODE7) /* (D12) mcasp0_axr0.gpio3[16] */
AM33XX_IOPAD(0x9a8, PIN_OUTPUT_PULLUP | MUX_MODE7) /* (D13) mcasp0_axr1.gpio3[20] */
AM33XX_IOPAD(0x9ac, PIN_OUTPUT_PULLUP | MUX_MODE7) /* (A14) mcasp0_ahclkx.gpio3[21] */
>;
};
dmtimer5_pins: dmtimer5_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x97c, PIN_OUTPUT | MUX_MODE1 | PULL_DISABLE)
>;
};
dmtimer6_pins: dmtimer6_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x978, PIN_OUTPUT | MUX_MODE1 | PULL_DISABLE)
>;
};
dmtimer7_pins: dmtimer7_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x9b4, PIN_OUTPUT | MUX_MODE4 | PULL_DISABLE)
>;
};
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins>;
status = "okay";
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins>;
status = "okay";
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&uart2_pins>;
status = "okay";
};
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&uart3_pins>;
status = "okay";
};
&uart4 {
pinctrl-names = "default";
pinctrl-0 = <&uart4_pins>;
status = "okay";
};
&uart5 {
pinctrl-names = "default";
pinctrl-0 = <&uart5_pins>;
status = "okay";
rts-gpio = <&gpio2 0 GPIO_ACTIVE_HIGH>;
rs485-rts-active-high;
rs485-rts-delay = <1 1>;
linux,rs485-enabled-at-boot-time;
};
/*
&spi0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&spi0_pins>;
spidev@0 {
status = "okay";
compatible = "rohm,dh2228fv";
reg = <0>;
spi-max-frequency = <24000000>;
};
};
*/
&gpio0 {
pinctrl-names = "default";
pinctrl-0 = <&gpio0_pins_default>;
status = "okay";
};
&gpio1 {
pinctrl-names = "default";
pinctrl-0 = <&gpio1_pins_default>;
status = "okay";
ti,no-reset-on-init;
ti,no-idle-on-init;
};
&gpio2 {
pinctrl-names = "default";
pinctrl-0 = <&gpio2_pins_default>;
status = "okay";
ti,no-reset-on-init;
ti,no-idle-on-init;
};
&gpio3 {
pinctrl-names = "default";
pinctrl-0 = <&gpio3_pins_default>;
status = "okay";
ti,no-reset-on-init;
ti,no-idle-on-init;
};
&i2c0 {
pinctrl-names = "default";
clock-frequency = <100000>;
status = "disable";
tps: tps@2d {
reg = <0x2d>;
};
eeprom: eeprom@50 {
compatible = "at24,24c02";
reg = <0x50>;
};
};
&usb {
status = "okay";
};
&usb_ctrl_mod {
status = "okay";
};
&usb0_phy {
status = "okay";
};
&usb1_phy {
status = "okay";
};
&usb0 {
status = "okay";
};
&usb1 {
status = "okay";
dr_mode = "host";
};
&cppi41dma {
status = "okay";
};
&lcdc {
status = "okay";
blue-and-red-wiring = "crossed";
};
&elm {
status = "okay";
};
&gpmc {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&nandflash_pins_s0>;
ranges = <0 0 0x08000000 0x1000000>; /* CS0: 16MB for NAND */
nand@0,0 {
compatible = "ti,omap2-nand";
reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
interrupt-parent = <&gpmc>;
interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
<1 IRQ_TYPE_NONE>; /* termcount */
rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
ti,nand-xfer-type = "prefetch-dma";
ti,nand-ecc-opt = "bch8";
ti,elm-id = <&elm>;
nand-bus-width = <8>;
gpmc,device-width = <1>;
gpmc,sync-clk-ps = <0>;
gpmc,cs-on-ns = <0>;
gpmc,cs-rd-off-ns = <44>;
gpmc,cs-wr-off-ns = <44>;
gpmc,adv-on-ns = <6>;
gpmc,adv-rd-off-ns = <34>;
gpmc,adv-wr-off-ns = <44>;
gpmc,we-on-ns = <0>;
gpmc,we-off-ns = <40>;
gpmc,oe-on-ns = <0>;
gpmc,oe-off-ns = <54>;
gpmc,access-ns = <64>;
gpmc,rd-cycle-ns = <82>;
gpmc,wr-cycle-ns = <82>;
gpmc,bus-turnaround-ns = <0>;
gpmc,cycle2cycle-delay-ns = <0>;
gpmc,clk-activation-ns = <0>;
gpmc,wr-access-ns = <40>;
gpmc,wr-data-mux-bus-ns = <0>;
/* MTD partition table */
/* All SPL-* partitions are sized to minimal length
* which can be independently programmable. For
* NAND flash this is equal to size of erase-block */
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "NAND.SPL";
reg = <0x00000000 0x000020000>;
};
partition@1 {
label = "NAND.SPL.backup1";
reg = <0x00020000 0x00020000>;
};
partition@2 {
label = "NAND.SPL.backup2";
reg = <0x00040000 0x00020000>;
};
partition@3 {
label = "NAND.SPL.backup3";
reg = <0x00060000 0x00020000>;
};
partition@4 {
label = "NAND.u-boot-spl-os";
reg = <0x00080000 0x00040000>;
};
partition@5 {
label = "NAND.u-boot";
reg = <0x000C0000 0x00100000>;
};
partition@6 {
label = "NAND.u-boot-env";
reg = <0x001C0000 0x00020000>;
};
partition@7 {
label = "NAND.u-boot-env.backup1";
reg = <0x001E0000 0x00020000>;
};
partition@8 {
label = "NAND.kernel";
reg = <0x00200000 0x00800000>;
};
partition@9 {
label = "NAND.file-system";
reg = <0x00A00000 0x06400000>;
};
partition@10 {
label = "NAND.app-config";
reg = <0x06e00000 0x00800000>;
};
partition@11 {
label = "NAND.app-bakup";
reg = <0x07600000 0x00A00000>;
};
};
};
/* #include "tps65910.dtsi" */
&tps {
vcc1-supply = <&vbat>;
vcc2-supply = <&vbat>;
vcc3-supply = <&vbat>;
vcc4-supply = <&vbat>;
vcc5-supply = <&vbat>;
vcc6-supply = <&vbat>;
vcc7-supply = <&vbat>;
vccio-supply = <&vbat>;
regulators {
vrtc_reg: regulator@0 {
regulator-always-on;
};
vio_reg: regulator@1 {
regulator-always-on;
};
vdd1_reg: regulator@2 {
/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
regulator-name = "vdd_mpu";
regulator-min-microvolt = <912500>;
regulator-max-microvolt = <1351500>;
regulator-boot-on;
regulator-always-on;
};
vdd2_reg: regulator@3 {
/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
regulator-name = "vdd_core";
regulator-min-microvolt = <912500>;
regulator-max-microvolt = <1150000>;
regulator-boot-on;
regulator-always-on;
};
vdd3_reg: regulator@4 {
regulator-always-on;
};
vdig1_reg: regulator@5 {
regulator-always-on;
};
vdig2_reg: regulator@6 {
regulator-always-on;
};
vpll_reg: regulator@7 {
regulator-always-on;
};
vdac_reg: regulator@8 {
regulator-always-on;
};
vaux1_reg: regulator@9 {
regulator-always-on;
};
vaux2_reg: regulator@10 {
regulator-always-on;
};
vaux33_reg: regulator@11 {
regulator-always-on;
};
vmmc_reg: regulator@12 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
};
};
&mac {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&cpsw_default>;
pinctrl-1 = <&cpsw_sleep>;
dual_emac;
status = "okay";
};
&davinci_mdio {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&davinci_mdio_default>;
pinctrl-1 = <&davinci_mdio_sleep>;
status = "okay";
};
&cpsw_emac0 {
phy_id = <&davinci_mdio>, <0>;
dual_emac_res_vlan = <2>;
phy-mode = "mii";
};
&cpsw_emac1 {
phy_id = <&davinci_mdio>, <2>;
dual_emac_res_vlan = <3>;
phy-mode = "mii";
};
&tscadc {
status = "okay";
adc {
ti,adc-channels = <0 1 2 3 4 5 6 7>;
ti,chan-step-opendelay = <0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0>;
ti,chan-step-sampledelay = <0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff>;
ti,chan-step-avg = <1 1 1 1 1 1 1 1>;
};
};
&sham {
status = "okay";
};
&aes {
status = "okay";
};
&rtc {
clocks = <&clk_32768_ck>, <&clkdiv32k_ick>;
clock-names = "ext-clk", "int-clk";
};
&wkup_m3_ipc {
ti,scale-data-fw = "am335x-evm-scale-data.bin";
};
&pruss_soc_bus {
status = "okay";
pruss: pruss@0 {
status = "okay";
};
};
&sgx {
status = "okay";
};
