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RTOS/AM5728: resolve Memory map prevented when addressing lower than 0x40000000

Part Number: AM5728
Other Parts Discussed in Thread: TPIC2810

Tool/software: TI-RTOS

Hi there,

I started a new ccsv8 project with a default app.cfg.

I need to address physical memory in 0x30100000.

The program crashes when attempting to read this address and the memory browser shows the error

"Memory map prevented reading 0x30100000"

How can I configure the project to allow access to this address range?

Thanks,

Nir.

  • Hi Nir,

    Which version of the AM57xx PSDK RTOS you are using? The latest is v5.02.

    Do you use AM572x TI board (EVM, IDK) or custom board?

    Address 0x30100000 belongs to the PCIE_SS2 Configuration space (0x30000000 to 0x3FFFFFFF). Do you have external device attached to the AM572x PCIe_SS2 port?

    Regards,
    Pavel
  • Hi Pavel,

    I'm using v5.02 and developing over idk am5728

    I'm using jailhouse hypervisor and I'm running linux on A15 core0 and TI-RTOS on A15 core1 as an inmate.

    In order to send interrupts from one core to the other I'm using uio_ivshmem mechanism.
    github.com/.../jailhouse

    This emulates a PCI device. BAR0 is located in 0x30100000.

    To start, I would like to send an interrupt from the TI-RTOS side to the linux core.
    To do so I need to be able to read/write this address range, but the memory browser can't reach it,
    and the program crashes when I attempt to read/write.

    What should I do in order to enable this memory range on the TI-RTOS side?

    Thanks,

    Nir.
  • Nir,

    Look at platform definition for evmDRA7xx in BIOS, it doesn`t seem to carve out separate memory for ARM core0 and ARM core1 as it does for DSP1 and DSP2. Please look at the platform definition in the file Platform.xdc under the folder path bios_6_45_01_29\packages\ti\platforms\evmDRA7XX

    It is possible that Core0 may be trashing the resources that have been setup for Core1. you can confirm this by looking at the map file core ARM core1 and ARM core0 and make sure that there are no overlapping memory sections.

    See below e2e thread for details:

    e2e.ti.com/.../502659

    Regards,
    Pavel
  • Hi Pavel,

    I have the same problem with no regard to jailhouse hypervisor or Core1.

    When I run the simplest ccsv8 TI-RTOS app on Core0 with the debugger I can't read memory address range 0x30100000.
    When I attempt to read/write this address the program goes to exit().

    Is it possible to configure the ccsv8 TI-RTOS project to enable reading/writing of this address?
    Once we solve this, I'll be able to try communication between cores with jailhouse hypervisor.


    Thanks,

    Nir.
  • Nir,

    Check if below e2e thread will be in help:

    e2e.ti.com/.../741997

    Regards,
    Pavel
  • Hi Pavel,

    I was able to allow the TI-RTOS app access to memory range 0x30100000 by adding the following lines to the configuration file:

    L1Attrs.type = Mmu.DescriptorType_BLOCK;

    L1Attrs.noExecute = true;

    L1Attrs.accPerm = 0;

    L1Attrs.attrIndx = 4;

    Mmu.setMAIRMeta(4, 0x00);

    var peripheralBaseAddr1 = 0x30100000;

    Mmu.setSecondLevelDescMeta(peripheralBaseAddr1, peripheralBaseAddr1, L1Attrs);

    Now I have a new problem:

    Using the jailhouse hypervisor I'm running Linux on A15 Core0 and TI-RTOS on A15 Core1.

    When attempting to access 0x30100000 (read or write, from RTOS or Linux) I get a dump from the kernel.

    On Linux side I try to address 0x30100000 with mmap. On RTOS side with a  simple = operator

    [  510.806776] ------------[ cut here ]------------

    [  510.811479] WARNING: CPU: 0 PID: 28 at /home/stx-ti/Projects/tisdk/build/arago-tmp-external-linaro-toolchain/work-shared/am57xx-evm/kernel-source/drivers/bus/omap_l3_noc.c:147 l3_interrupt_handler+0x254/0x370

    [  510.830074] 44000000.ocp:L3 Standard Error: MASTER MPU TARGET PCIE2 (Read Link): At Address: 0x00101010 : Data Access in User mode during Functional access

    [  510.844042] Modules linked in: jailhouse(O) uio_ivshmem(O) uio ecatmc r8169 mc_gp_timer ec_master xhci_plat_hcd xhci_hcd usbcore dwc3 udc_core usb_common ti_prueth pru_rproc snd_soc_omap_hdmi_audio pruss pruss_intc c_can_platform c_can omap_aes_driver can_dev omap_sham pruss_soc_bus ahci_platform libahci_platform omap_wdt libahci libata scsi_mod phy_omap_usb2 ti_vpe ti_vip ti_sc ti_csc ti_vpdma dwc3_omap rtc_omap gpio_pisosr rtc_palmas extcon_palmas ov2659 gpio_tpic2810 v4l2_fwnode omap_des des_generic crypto_engine omap_crypto omap_remoteproc virtio_rpmsg_bus rpmsg_core remoteproc sch_fq_codel

    [  510.897004] CPU: 0 PID: 28 Comm: irq/23-l3-app-i Tainted: G           O    4.14.79-rt47-g94d616baca #1

    [  510.897007] Hardware name: Generic DRA74X (Flattened Device Tree)

    [  510.897009] Backtrace:

    [  510.897030] [<c020b154>] (dump_backtrace) from [<c020b438>] (show_stack+0x18/0x1c)

    [  510.897036]  r7:00000009 r6:60050013 r5:00000000 r4:c1057fe0

    [  510.897047] [<c020b420>] (show_stack) from [<c0927c7c>] (dump_stack+0x90/0xa4)

    [  510.897059] [<c0927bec>] (dump_stack) from [<c022acdc>] (__warn+0xec/0x104)

    [  510.897063]  r7:00000009 r6:c0bd8c5c r5:00000000 r4:d422fe40

    [  510.897072] [<c022abf0>] (__warn) from [<c022ad34>] (warn_slowpath_fmt+0x40/0x48)

    [  510.897078]  r9:00000011 r8:d42149d0 r7:c0bd8ac8 r6:00000004 r5:c0bd8b7c r4:c0bd8c2c

    [  510.897086] [<c022acf8>] (warn_slowpath_fmt) from [<c051da10>] (l3_interrupt_handler+0x254/0x370)

    [  510.897089]  r3:d4214840 r2:c0bd8c2c

    [  510.897091]  r4:80080001

    [  510.897100] [<c051d7bc>] (l3_interrupt_handler) from [<c02810a8>] (irq_forced_thread_fn+0x28/0x7c)

    [  510.897105]  r10:c0281080 r9:d4214d40 r8:d41df100 r7:00000001 r6:00000000 r5:d41df100

    [  510.897107]  r4:d4214d40

    [  510.897113] [<c0281080>] (irq_forced_thread_fn) from [<c0281400>] (irq_thread+0x130/0x208)

    [  510.897117]  r7:00000001 r6:00000000 r5:ffffe000 r4:d4214d64

    [  510.897124] [<c02812d0>] (irq_thread) from [<c0248814>] (kthread+0x164/0x16c)

    [  510.897129]  r10:d406bb18 r9:c02812d0 r8:d4214d40 r7:d422e000 r6:00000000 r5:d4214d80

    [  510.897131]  r4:d41e1080

    [  510.897139] [<c02486b0>] (kthread) from [<c0207960>] (ret_from_fork+0x14/0x34)

    [  510.897143]  r10:00000000 r9:00000000 r8:00000000 r7:00000000 r6:00000000 r5:c02486b0

    [  510.897146]  r4:d4214d80

    [  510.897149] ---[ end trace 0000000000000002 ]---

    Does the Linux kernel prevent access to the registers?

    Is there a way to bypass this restriction?

    Thanks,

    Nir.

  • Nir,

    From what I understand you trying to read 0x30100000 address from user space with application code?

    I would suggest you to try to read 0x30100000 first with devmem2 and/or omapconf tool. If successful, you need to align your application code to devmem2 and/or omapconf tool software.

    You might also try to read PCIE2 register at start address 0x51800000 and check if that will be successful.

    Check also if below pointers will be in help:

    e2e.ti.com/.../739997
    e2e.ti.com/.../768883
    e2e.ti.com/.../651798

    Regards,
    Pavel