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CCS/AM3359: The clock of MCSPI of AM3359 is always at 48MHz. What is the reason?

Annie Liu
Genius 10295 points
Part Number: AM3359

Tool/software: Code Composer Studio

Hi Team,

The am3359 ice v2 development board uses TI RTOS. As shown in the figure, it is configured with the structure of the mcspi register, but spi1 cannot communicate. Customer has changed inClk and outClk, but when sending data, the SPI1_SCLK captured by the oscilloscope is always at 48MHz, what is the reason? Thanks

 

  • 0
    TI__Guru**** 170625 points
    Hi Annie,

    Which version of the AM335x TI PSDK RTOS you are using?

    I assume AM335x McSPI1 module is in master mode. Do you need the frequency on SPI1_SCLK pin to be higher or lower? Note that this frequency can be up to 48MHz (20.8ns minimum), so you can only make it lower if you need. For that purpose you need to track below registers in RTOS code and change these according to your new frequency:

    CHxCONF[29] CLKG, CHxCONF[5:2] CLKD, CHxCTRL[15:8] EXTCLK

    Check below AM335x TRM section for details:

    24.3.2.9 Clock Ratio Granularity

    Regards,
    Pavel