Tool/software: Linux
custom board. 2 x16 DDR3 chips layed out on board for a 32 bit wide bus.
DDR part number: IS43TR16128C-125KBL
attached is the EMIF tool
4118.SPRAC70_AM437x_EMIF_Configuration_Tool_V20.xlsx
and datasheet
43-46TR16128C-82560CL-1102707.pdf
for our board. the settings programmed into our u-boot configuration for the clock (19.2MHz input to system) with a target of 400MHz DDR clock
const struct dpll_params UTI_dpll_ddr = {
125, 5, 1, -1, 2, -1, -1}; //400MHz
const struct ctrl_ioregs ioregs_ddr3 = {
.cm0ioctl = DDR3_ADDRCTRL_IOCTRL_VALUE,
.cm1ioctl = DDR3_ADDRCTRL_WD0_IOCTRL_VALUE,
.cm2ioctl = DDR3_ADDRCTRL_WD1_IOCTRL_VALUE,
.dt0ioctl = DDR3_DATA0_IOCTRL_VALUE,
.dt1ioctl = DDR3_DATA0_IOCTRL_VALUE,
.dt2ioctrl = DDR3_DATA0_IOCTRL_VALUE,
.dt3ioctrl = DDR3_DATA0_IOCTRL_VALUE,
.emif_sdram_config_ext = 0xc163,
};
const struct emif_regs ddr3_emif_regs_400Mhz = {
.sdram_config = 0x61A012B2,
.ref_ctrl = 0x00000C30,
.sdram_tim1 = 0xEAAAD4DB,
.sdram_tim2 = 0x26437FDA,
.sdram_tim3 = 0x5F7F83FF,
.read_idle_ctrl = 0x00050000,
.zq_config = 0x500742C6,
.temp_alert_config = 0x0,
.emif_ddr_phy_ctlr_1 = 0x00048008,
.emif_ddr_ext_phy_ctrl_1 = 0x00040100,
.emif_ddr_ext_phy_ctrl_2 = 0x0,
.emif_ddr_ext_phy_ctrl_3 = 0x0,
.emif_ddr_ext_phy_ctrl_4 = 0x0,
.emif_ddr_ext_phy_ctrl_5 = 0x0,
.emif_rd_wr_lvl_rmp_win = 0x0,
.emif_rd_wr_lvl_rmp_ctl = 0x80000000,
.emif_rd_wr_lvl_ctl = 0x0,
.emif_rd_wr_exec_thresh = 0x80000405,
.emif_prio_class_serv_map = 0x80000001,
.emif_connect_id_serv_1_map = 0x80000094,
.emif_connect_id_serv_2_map = 0x00000000,
.emif_cos_config = 0x000FFFFF
};
i do a fill with large swaths of memory but code composer seems to crash eventually if it is too big or too often (is it the program or our board that is at fault?). and when i fill up large portion of memory that succeed i notice that my memory viewer will suddenly show areas of DDR space that were once visible as all ??????'s
our system does not boot out of u-boot so it would be nice to make sure at least these settings are correct.
anything i miss?
thanks
