RTOS/TDA2P-ACD: SD boot with MLO not working but sbl binary working through CCS

Hi Risabh,

Following are the lisa map in SBL :

/* MA_LISA_MAP_i */
HW_WR_REG32(SOC_MA_MPU_CONF_REGS_BASE + LISA_MAP_0, 0x90400200U);
HW_WR_REG32(SOC_MA_MPU_CONF_REGS_BASE + LISA_MAP_1, 0x80400100U);
/* DMM_LISA_MAP_i */
HW_WR_REG32(SOC_DMM_CONF_REGS_BASE + LISA_MAP_0, 0x90400200U);
HW_WR_REG32(SOC_DMM_CONF_REGS_BASE + LISA_MAP_1, 0x80400100U);

Same are present in the gel file used while loading through CCS.


Regards,
Deepika

Hi Deepika,

This behavior is certainly strange. You have mentioned that VSDK boot is working when you load SBL binary.

Can you confirm that there are no gels when the boot  is working.

Also in the failure case, can you connect all cores and load symbols to check if any core has aborted.

Regards,

Rishabh

Hi Rishabh,

Yes we checked the LISA map registers in both the cases and they are same.

We also loaded the symbols and could see that ipu1_0 is aborted.

What could be the issue for ipu1_0 to abort ?

Regards,

Deepika

Hi Rishabh,

Please find attached ammu file.

8371.Ammu1_bios.cfg

We have disabled the IPU2 core. We will try disabling the IPU1 core and keep you posted.

Regards,

Deepika

Hi Rishabh,

Yes we tried with IPU1 disabled. All cores seem to have aborted/exited. Attaching the screenshot of the same.

Regards,

Deepika

Deepika,

My bad, I didn't realize that you have already disabled IPU2. You need to have at least one IPU core for Vision SDK to work.
Can you add a while(1) in the beginning of IPU1_0 main and see if the control reaches there successfully.

Regards,
Rishabh

Hi Rishabh,

Yes, we tried to add while(1) in the main() in file main_ipu1_0.c file.

And after loading the symbols through no gels in CCS, we could see the IPU1_0 core is in the while loop.

We tried step debug from there and could see that the IPU1_0 core aborted after entering the API "BIOS_start();" in the file main_common_ipu1_0.c file.

Regards,

Deepika

Hi Rishabh,

One more observation, when we load the  individual binaries from gel we are getting the following message on CCS console

"CortexA15_0: Loader: One or more sections of your program falls into a memory region that is not writable.  These regions will not actually be written to the target.  Check your linker configuration and/or memory map."

This error comes with working case also. Can you please tell me which memory it is trying to access.

This is coming from A15 core. We have analysed the memory map file ,but not able to find out exactly what section is causing the issue.

Regards,

Deepika

1261.Ammu1_bios.cfgHi Rishabh,

We tried the following:

1) Loaded with no gels and removed Small pages configuration completely from AMMU1_bios.cfg file.We loaded SBL from the CCS and kept the appimage in the SD card. It stopped at the same place  where it gets stuck.

We read the IPU UNICACHE MMU registers,these values are the same which is set in the gel files.( Although its loaded without the gel)

2) Loaded with gels with  small pages configuration completely removed from AMMU1_bios.cfg file. Loaded SBL from CCS ,it runs successfully.

So even after removing the small pages completely from AMMU1_bios.cfg the appimage works when loaded with gel.

Attaching the AMMU1_bios.cfg.

I am not able to understand the cause of the issue.

Regards,

Deepika

Hi Rishabh,

We did the following steps:

1] While(1) loop was added before jumping to MPU CPU app print and build the SBL.

2] We loaded SBL binary on A15 core with No-Gels. ( Appimage was kept in SD card)

3] We connected all other cores and loaded the symbols. ( in the same debug session in which sbl was loaded)

We could see all the cores are waiting for ipc attach. Sharing the screenshots for the same.

We checked the DDR registers, those are same as configured in the sblutils_ddr_config.c file. Apart from this, we check PRCM_MPU_CLKCTRL register, It is showing the modules to be functional and out of reset.

Is there any other specific registers you want us to check?

Regards,

Deepika