• State Resolved
  • Locked Locked
  • Replies 2 replies
  • Subscribers 98 subscribers
  • Views 418 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TMS320C5535: C5000 chip support library IDLE examples not working

Eddie Carrera
Intellectual 820 points

Part Number: TMS320C5535

I'm developing on a TMS320C5535 using the XDS110 debugger, the C5000 chip support library, and Code Composer version: 8.3.0.00009. I'm currently trying to get the C5535 to go into IDLE mode. I followed SPRAC07 but haven't been able to get the processor into IDLE mode in my own code. 

So instead, I imported CSL_PowerManagement_IDLE2_Example and CSL_PowerManagement_IDLE3_Example to see if those examples work so I can follow their examples. 

I ran the IDLE2/IDLE3 examples and found that the current draw is so high, it probably never even entered IDLE mode. Here are my findings:

Running at 100MHz: IDLE2 draws 61mA, IDLE3 draws 50mA

Running at 60MHz: IDLE2 draws 56mA, IDLE3 draws 50mA

These number imply that the DSP never enters IDLE mode, even though the example code complies and runs successfully without errors. No run-time errors were given in the console. I also ensured that the appropriate macro is defined (CHIP_C5535). So any conditional compilation should not be the issue. Is there anything else you can suggest for getting CSL_PowerManagement_IDLE2_Example and CSL_PowerManagement_IDLE3_Example to work?

Best, 

Eddie

  • 0
    TI__Guru 65405 points
    Hi Eddie,

    I would like to be sure that you have followed the instructions for test procedure described in "Read me.txt" file from CSL_PowerManagement_IDLE2_Example project:
    TEST PROCEDURE AND EXPECTED RESULT:
    1. Ensure JP10 CLKSEL is shorted so that usb osc is not used.
    2. Run the test. The RTC alarm (expected after approx. 30s) would be set.
    3. Test will stop once usb clk is shut off.
    4. Pause and Resume the test.
    5. The test will execute the idle instsrn that will idle the cpu and wait for the alarm.
    6. Observe if the alarm interrupt got the CPU out of idle state.

    Could you specify what board you are using? If it is a custom board could you provide schematics?
    Also it is important to specify at which point you are measuring the power consumption?

    Regards,
    Tsvetolin Shulev
  • 0 in reply to Cvetolin Shulev-XID
    Intellectual 820 points

    Tsvetolin,

    Unfortunately, this custom board is for a military application so I cannot post the schematics online. This is a battery powered application, where the battery operates at 6V. However, I'm currently supplying 6V using a DC power supply instead of batteries because this project is still under development.

    I'm measuring the current at the battery holder leads, so I'm measuring current of the whole system on the custom board but only the C5535 is on. All other ICs have been disconnected from the system, so the C5535 is the only IC consuming power. I have TI buck regulators that step down the 6V to 3.3V (DVDDIO/LDOI/DVDDRTC) and 1.3V(CVDDRTC).

    This is the output on the console as I run the example in debug mode:

    CSL RTC TESTS

This test demonstrates RTC ALARM interrupt generation capability
RTC_setCallback Successful
RTC_config Successful
RTC_getConfig Successful
RTC_setTime Successful
RTC_setDate Successful
RTC_setAlarm Successful
RTC_eventEnable for ALARM EVENT Successful

Starting the RTC..alarm will be produced on 12:12:40:0512, 3-12-13 ....Have a sleep 

Current Time and Date is : 12:12:12:0163, 03-12-13

Disabling USB Clk domain

Disabling Clk to all preipherals except Sysclk to clk generator

System is in IDLE2 mode. You may measure the power now...
 Expect The Alarm event and subsequent exit from  the IDLE state at the time mentioned above
RTC Alarm Interrupt has been generated

Current Time and Date is : 12:12:21:0404, 03-12-13

CSL RTC TESTS COMPLETED

    As you can see, the RTC alarm is NOT produced 30 seconds later. Instead it's being produced 10 seconds later, so it seems like this could potentially be a bug. 

    Best, 

    Eddie