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CCS/AM5746: SDR104 clock setting

Part Number: AM5746

Tool/software: Code Composer Studio

Hi,
I have been anxious about the SDR104 CLK setting on the SD card.

The following is described in the source code.
C: \ ti \ pdk_am57xx_1_0_11 \ packages \ ti \ drv \ mmcsd \ src \ v1 \ MMCSD_v1.c 
1642: clk_freq = 208000000U; / * Max freq supported is 208 MHz * /

However, AM574x TRM 6946 page, 25.1.1 eMMC / SD / SDIO Features has the following description.
・SDR104 (1.8V IOs) cards can be supported up to 192 MHz clock (96 MBps max) - MMC1 only

Is there a problem with the 208 MHz setting?

Regards,
Rei

  • Hi,

    From the SD association, the maximum clock speed is 208MHz for SDR104 mode. The IP in AM57x silicon only supports clock up to 192MHz. The driver code you mentioned:

    clk_freq=208000000U; /* Max freq supported is 208MHz */
    MMCSD_drv_log(Diags_USER1,"MMCSD_switch_card_speed: Request to switch to SDR104: 192Mhz\n");

    should be corrected for the right clock frequency, I opened a ticket for it.

    Regards, Eric
  • Hi Eric,
    Thank you for your support always.

    clk_freq=192000000U;
    Is that ok?

    Regards,
    Rei
  • Rei,

    >>>>clk_freq=192000000U; >>>>>This should OK, but we didn't test it.

    From my reading of the code, 192MHz or 208MHz is the desired output frequency. It is used in HSMMCSDSetBusFreq() function, the input frequency to this function is 96MHz and the calculated clkDiv = 1. So using clk_freq=192000000U (your suggestion) or clk_freq=208000000U (original code) doesn’t matter in the final calculation, it always output 192MHz.

    Regards, Eric