66AK2H12: SPI Boot frequency register value

Kaz,

For SPI and I2C boot on this device, the ROM boots the device with PLL in bypass mode so the Main PLL and ARM PLL are running in bypass at the same clock as SYSCLKCLKIN/OSCIN used.

The ROM reads configures the boot parameter table and sets the frequency in that boot parameter table as a multiple of 100Khz so for 5MHZ setting, the value 50 will be used. The default SPI clock for SPI boot is 500 Khz so this value should show up as 5 after boot.

I ran a quick test using the ROM symbols to confirm that setting as you can see from below screenshot:

Hope this helps. Let us know if you need any more information 

Regards,

Rahul

Kaz,

Can you indicate what is the SYSCLKIN used on the board.  This is the code in the ROM by which the SPI clock is configured. The default reference frequency used by the ROM is 312 Mhz.

v = (UINT32)p_boot_params->sysFreqMhz * 1000;  /* CPU frequency in kHz */

v = v / (DEVICE_SPI_MOD_DIVIDER * (((UINT32)(p_boot_params->busFreq100Khz) * 100)));

if (v > DEVICE_SPI_MAX_DIVIDER)

       v = DEVICE_SPI_MAX_DIVIDER;

spiCfg.clkdiv = v;

Where

#define DEVICE_SPI_MOD_DIVIDER          6               /* sysclock 6, which is div by 6 */

#define DEVICE_SPI_MAX_DIVIDER          0xff            /* The maximum value that should be programmed into the SPI divider */

If the clock on the custom board is configured at 100 Mhz and the boot parameter indicates 312.5 Mhz (due to ROM defaults) might explain why the clock in 3.125 times slower than expected. 

Regards,

Rahul