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Original question:

RTOS/AM5728: How to realize reset of PCIe base specification

RTOS/AM5728: How to meet the 20ms PCIE RESET requirement by XIP-boot

matusan
Guru 10235 points
Part Number: AM5728

Tool/software: TI-RTOS

Hello, TI Experts,

 

Our customer sent us additional questions about PCIE by using PROCESSOR-SDK-RTOS-AM57X from below E2E-thread.

http://e2e.ti.com/support/processors/f/791/p/790003/2924526#2924526

 

They said "it is difficult to delay the PERST signal for their products."

So they want to reduce SBL boot time by changing XIP-boot from current QSPI-Flash boot.

(They said SBL boot time is about 25ms by QSPI-Flash boot.)

 

Question:

- Are there any information to realize XIP-boot with AM572x including boot time result?

- Could you tell us how much fast the XIP-boot by changing XIP-boot from QSPI-Flash boot?

 

They expect to realize to meet the 20ms PCIE requirement in below pdf by changing XIP-boot from QSPI-Flash boot.

If there are any comment or successful-SBL-use case of less than 20ms boot-time, please tell us.

 

http://www.lttconn.com/res/lttconn/pdres/201402/20140218105502619.pdf

6.6.1. Conventional Reset

 

Best regards,

  • 0
    TI__Guru** 116170 points

    XIP boot on AM574x/AM572x device is only supported with parallel NOR flash devices with GPMC as the communication interface and not with QSPI NOR flash devices as you can see from the TRM section 33.3.7.3 XIP memory. 

    We don`t have a GPMC NOR on the IDK evaluation HW and so this boot mode is not supported on that HW. The boot mode has been test and supported by our auto motive team  using DRA72x EVM using Processor SDK RTOS auto. 

    Let me check internally if the boot time has been captured and can be shared with you. 

    Regards,

    Rahul

  • 0 in reply to Rahul Prabhu
    Guru 10235 points

    Hi,

     

    Thank you very much for your kindness.

    I really appreciate your help.

    We are waiting for your next feedback about your checking result.

     

    Best regards,