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Linux/PROCESSOR-SDK-AM437X: How to config DTS file to get GPMC_CLK signal.

user5926475
Expert 1270 points

Part Number: PROCESSOR-SDK-AM437X
Other Parts Discussed in Thread: AM4379, AM4372

Tool/software: Linux

Hi,

I want to config DTS file to get GPMC_CLK, but there is no output from A12(Am4379 ball number). I config the DTS in gpmc as:

    fpga1@1,0 {
        compatible = "ti,fram";//cfi-flash";//ti,fram";
        #address-cells = <1>;
        #size-cells = <1>;
        reg = <3 0 0x01000000>;        /* CS3 device IO registers */
        
    
        bank-width=<2>;
        gpmc.sync-clk-ps = <10000>;//10000>; /*Mininum clock period for synchronous mode, in picoseconds */
        gpmc,mux-add-data=<2>;
        gpmc,cs-on-ns = <0>;
        gpmc,cs-rd-off-ns = <186>;
        gpmc,cs-wr-off-ns = <186>;
        gpmc,adv-on-ns = <12>;
        gpmc,adv-rd-off-ns = <48>;
        gpmc,adv-wr-off-ns = <48>;
        gpmc,oe-on-ns = <54>;
        gpmc,oe-off-ns = <168>;
        gpmc,we-on-ns = <54>;
        gpmc,we-off-ns = <168>;
        gpmc,rd-cycle-ns = <186>;
        gpmc,wr-cycle-ns = <186>;
        gpmc,access-ns = <114>;
        gpmc,page-burst-access-ns = <6>;
        gpmc,bus-turnaround-ns = <12>;
        gpmc,cycle2cycle-delay-ns = <18>;
        gpmc,wr-data-mux-bus-ns = <90>;
        gpmc,wr-access-ns = <186>;
    };
   

When I write data to CS3, the cs, we, ale etc.signals appear normally, but the GPMC-CLK(A12) pins no waveform.. is anything missed in the DTS?

I attachment the DTS file here.

Best Regards,1538.am437x-gp-evm.rar

  • 0
    TI__Guru**** 393215 points
    Hi,

    You also need to pinmux ball A12 to Mode 0. It is is in Mode 7 by default.
  • 0 in reply to Biser Gatchev-XID
    Expert 1270 points

    Hi Biser,

    I have defined pinmux ball A12 to Mode 0 in gpmc_bus_default in the last attached DTS file:

        gpmc_bus_default: gpmc_bus_default {
            pinctrl-single,pins = <
                AM4372_IOPAD(0x800, PIN_INPUT  | MUX_MODE0)    /* gpmc_ad0.gpmc_ad0 */
                AM4372_IOPAD(0x804, PIN_INPUT  | MUX_MODE0)    /* gpmc_ad1.gpmc_ad1 */
                AM4372_IOPAD(0x808, PIN_INPUT  | MUX_MODE0)    /* gpmc_ad2.gpmc_ad2 */
                AM4372_IOPAD(0x80c, PIN_INPUT  | MUX_MODE0)    /* gpmc_ad3.gpmc_ad3 */
                AM4372_IOPAD(0x810, PIN_INPUT  | MUX_MODE0)    /* gpmc_ad4.gpmc_ad4 */
                AM4372_IOPAD(0x814, PIN_INPUT  | MUX_MODE0)    /* gpmc_ad5.gpmc_ad5 */
                AM4372_IOPAD(0x818, PIN_INPUT  | MUX_MODE0)    /* gpmc_ad6.gpmc_ad6 */
                AM4372_IOPAD(0x81c, PIN_INPUT  | MUX_MODE0)    /* gpmc_ad7.gpmc_ad7 */
                
                AM4372_IOPAD(0x820, PIN_INPUT  | MUX_MODE0)    /* gpmc_ad0.gpmc_ad8 */
                AM4372_IOPAD(0x824, PIN_INPUT  | MUX_MODE0)    /* gpmc_ad1.gpmc_ad9 */
                AM4372_IOPAD(0x828, PIN_INPUT  | MUX_MODE0)    /* gpmc_ad2.gpmc_ad10 */
                AM4372_IOPAD(0x82c, PIN_INPUT  | MUX_MODE0)    /* gpmc_ad3.gpmc_ad11 */
                AM4372_IOPAD(0x830, PIN_INPUT  | MUX_MODE0)    /* gpmc_ad4.gpmc_ad12 */
                AM4372_IOPAD(0x834, PIN_INPUT  | MUX_MODE0)    /* gpmc_ad5.gpmc_ad13 */
                AM4372_IOPAD(0x838, PIN_INPUT  | MUX_MODE0)    /* gpmc_ad6.gpmc_ad14 */
                AM4372_IOPAD(0x83c, PIN_INPUT  | MUX_MODE0)    /* gpmc_ad7.gpmc_ad15 */
                
                AM4372_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE0)    /* gpmc_wait0.gpmc_wait0 */
                AM4372_IOPAD(0x874, PIN_OUTPUT_PULLUP | MUX_MODE7)    /* gpmc_wpn.gpmc_wpn */
                AM4372_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE0)        /* gpmc_csn0.gpmc_csn0  */
                AM4372_IOPAD(0x890, PIN_OUTPUT | MUX_MODE0)        /* gpmc_advn_ale.gpmc_advn_ale */
                AM4372_IOPAD(0x894, PIN_OUTPUT | MUX_MODE0)        /* gpmc_oen_ren.gpmc_oen_ren */
                AM4372_IOPAD(0x898, PIN_OUTPUT | MUX_MODE0)        /* gpmc_wen.gpmc_wen */
                AM4372_IOPAD(0x89c, PIN_OUTPUT | MUX_MODE0)        /* gpmc_be0n_cle.gpmc_be0n_cle */
                
                AM4372_IOPAD(0x88c, PIN_OUTPUT_PULLUP | MUX_MODE0)   /*gpmc_clk */
                AM4372_IOPAD(0x888, PIN_OUTPUT_PULLUP | MUX_MODE0)    /* gpmc_csn3 */
                AM4372_IOPAD(0x884, PIN_OUTPUT_PULLUP | MUX_MODE0)    /* gpmc_csn2 */
                AM4372_IOPAD(0x878, PIN_OUTPUT_PULLUP | MUX_MODE4)    /* gpmc_dir */
            
            >;
        };

    The "gpmc_bus_default" is defined in @gpmc as:

    &gpmc {
        status = "okay";
        pinctrl-names = "default";
        pinctrl-0 = <&gpmc_bus_default>;
        ranges = <0 0 0x08000000 0x01000000>,    /* CS0 space. Min partition = 16MB */
                 <3 0 0x01000000 0x01000000>,    /* CS3 space, FPGA cs3 */
                 <2 0 0x02000000 0x01000000>;   /* CS2 space, FPGA cs2 */
        nand@0,0 {
       ...   

    };
        fpga1@1,0 {
            compatible = "ti,fram";//cfi-flash";//ti,fram";
           ...

         }

    ;
      

     Cann't these  pinmuxs in  "pinctrl_0" be  set in kernel during dt pinctrl_parse? I don't know how to set pinmux in linux driver, I cann't apply *omap_ctrl_base_get(void) to get control register base address in linux 4.14.67.(writel(0, (void *)(base_address+0x88c));


    I  move the "AM437_IOPAD(0x88c, PIN_OUTPUT_PULLUP|MUX_MODE0)" to the node "unused_pins:unused_pins" in the DT file today, and try again, it is the same.

    May it not be the cause of ball A12 settting error?

    Best Regards,

  • 0 in reply to Biser Gatchev-XID
    Expert 1270 points
    Hi Biser,
    I get the AM4379 control_module register base address through DT in my linux driver and I verify it by read offset 0 the ctrl revision register and get the expected value 0x4f0000100. Then I read the offset 0x88c the GPMC_CLK register, get the default value 0x10000, the default mode is 0, not 7.
  • 0 in reply to Biser Gatchev-XID
    Expert 1270 points

    I cann't get gpmc_clk in gpmc config by config DT file. I do not know what is wong with my DT config. I have provided the DT file and the gpmc config details but get no answer further .
    Best Regards,

  • 0 in reply to user5926475
    TI__Mastermind 45065 points
    Hello,

    If you are doing a synchronous write, I am wondering if you could please verify the CONFIG1 register has the WRITETYPE=1. Also, please try changing the gpmc_clk to "PIN_INPUT".

    Regards,
    Krunal