Tool/software: TI-RTOS
Hi,
I'm using the MessageQ IPC for communication between the A15 and M4 cores and based my code off an example project.
I have read:
http://processors.wiki.ti.com/index.php/Linux_IPC_on_AM57xx
but it's unclear to me how to configure Message Q sizes.
Here are my settings from rsc_table_vahu_ip.c
#define IPU_MEM_IPC_VRING_SIZE SZ_1M
#define IPU_MEM_IPC_DATA_SIZE SZ_1M
#if defined(VAYU_IPU_1)
#define IPU_MEM_TEXT_SIZE (SZ_1M)
#elif defined(VAYU_IPU_2)
#define IPU_MEM_TEXT_SIZE (SZ_1M * 6)
#endif
#if defined(VAYU_IPU_1)
#define IPU_MEM_DATA_SIZE (SZ_1M * 5)
#elif defined(VAYU_IPU_2)
#define IPU_MEM_DATA_SIZE (SZ_1M * 48)
#endif
#define IPU_MEM_IOBUFS_SIZE (SZ_1M * 90)
/*
* Assign fixed RAM addresses to facilitate a fixed MMU table.
* PHYS_MEM_IPC_VRING & PHYS_MEM_IPC_DATA MUST be together.
*/
/* See CMA BASE addresses in Linux side: arch/arm/mach-omap2/remoteproc.c */
#if defined(VAYU_IPU_1)
#define PHYS_MEM_IPC_VRING 0x9D000000
#elif defined (VAYU_IPU_2)
#define PHYS_MEM_IPC_VRING 0x95800000
#endif
#define PHYS_MEM_IOBUFS 0xBA300000
/*
* Sizes of the virtqueues (expressed in number of buffers supported,
* and must be power of 2)
*/
#define IPU_RPMSG_VQ0_SIZE 256
#define IPU_RPMSG_VQ1_SIZE 256
This is my intepretation, but I'm not if it's correct:
Is these settings saying there are only 2 queues supported or 256 queues?
What is the size of each queue?
If the message Q is full, will MessageQ_put return an error?
We've seen situations where the the M4 is allocating and sending messages and the consumer is not reading and freeing messages fast enough. Over time this causes a memory leak to grow.
What is the best way to detect this error. I noticed there is a Message!_count() function that return number of messages in the queue. Would you recommend using that call to limit the number of messages in the Queue?
Thanks,
Christine
