EMIF bus is connected with FPGA and NANdflash, whether it can realize real-time data storage of Nanflash and sequential operation of FPGA at the same time?
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EMIF bus is connected with FPGA and NANdflash, whether it can realize real-time data storage of Nanflash and sequential operation of FPGA at the same time?
Zhang Ping,
As long as the target devices conform to the asynchronous memory interface that supports CS signaling, it should be possible to connect both devices using a single bus.
You can refer to this EMIF appnote and the device Technical Reference Manual for additional information.
-Tommy