Linux/AM3358: mcasp ahclkx divider

David Benjamin

Prodigy 200 points

Part Number: AM3358
Other Parts Discussed in Thread: TAS2557

Tool/software: Linux

I am trying to produce a 12MHz clock output on MCASP1 AHCLKX pin.

OSC0 has 24MHz crystal
TI-SDK 5.0

Based on the TRM, it looks like I need to properly set the HCLKXDIV bits in the AHCLKXCTL register.

My question is how/where do I set the register value? ...in the device tree?...userspace?....?

Any guidance would be appreciated.

David

over 6 years ago

0 Krunal Bhargav34 over 6 years ago

TI__Mastermind 45015 points

Hello David,

Could you please share which PSDK Linux you are using? I am wondering if you could please share more information about your setup such as desired frame sync, I2S format? and master/slave configuration.

Regards,
Krunal

0 David Benjamin over 6 years ago in reply to Krunal Bhargav34

Prodigy 200 points

Krunal,

Thank you for the reply.

I am using TI-SDK 5.0

am335x is the I2S master
tas2557 is i2S slave

48kHz sampling frequency

0 David Benjamin over 6 years ago in reply to David Benjamin

Prodigy 200 points

Sorry. I meant to say I am using MCASP0

MCASP0_AHCLKX -> TAS2557 MCLK
MCASP0_ACLKX -> TAS2557 BCLK
MCASP0_FSX -> TAS2557 WCLK

0 Krunal Bhargav34 over 6 years ago in reply to David Benjamin

TI__Mastermind 45015 points

Hello,

Please refer to the section "5. Additional Topics" in the following document. In order to get a 48khz Frame Sync clock, you will need a 24.576 MHz clock. Also, please refer to the following thread, it contains useful resources needed to configure the drivers for McASP.

Regards,

Krunal

0 David Benjamin over 6 years ago in reply to Krunal Bhargav34

Prodigy 200 points

Thank you for the response Krunal.

I am also interested in outputting 12MHz on the MCASPx AHCLKX pin. How do I modify the HCLKXDIV bits in the AHCLKXCTL register. Do I modify via devicetree, userspace...etc?

0 Krunal Bhargav34 over 6 years ago in reply to David Benjamin

TI__Mastermind 45015 points

Hi David,

Based on my understanding, the Linux driver will automatically configure the integer dividers based on the format of the data being played. I need to check with our experts if there is a valid way of manually setting one of the dividers. As an experiment, you could try using devmem2/omapconf to write to the AHCLKXCTL register.

Regards,
Krunal

0 Krunal Bhargav34 over 6 years ago in reply to Krunal Bhargav34

TI__Mastermind 45015 points

Hi David,

Based on my conversation with our developers, you would need to create a custom McASP machine driver to accomplish a 12MHz clock output on MCASP0 AHCLKX pin. Ideally, on our boards, McASP acts as the slave and the codec provides the necessary clocks to the McASP. I am wondering if a similar setup is possible on your custom board.

Regards,
Krunal

0 David Benjamin over 6 years ago in reply to Krunal Bhargav34

Prodigy 200 points

Thanks for the information Krunal. This definitely helped. We ended up not sourcing MCLK from the am335x and configuring the smart amp to use BCLK.

Processors

Processors forum

Linux/AM3358: mcasp ahclkx divider