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66AK2H14: How is the 10GBE Powered On?

Glen%20Fujimori
Prodigy 70 points

Part Number: 66AK2H14

Hello,

I'm am trying to power on the 10GbE module/domain in the SoC using VxWorks.  First, I have gotten the Linux 10GBE driver working with the Mistral REVD board so I know that the 10Gbe module can be powered on.

I haven't been able to power on the 10gbE module using either u-boot and monitor commands or programmatically.  I assume that I am missing some other requirement for powering up the 10Gbe module.

I have been able to bring up other domains such as pcie, srio and hyperlink using u-boot commands following the steps defined in the PSC user guide. I've verified this by dumping the config spaces of those domains and seeing the module identifiers. (Before they are enabled the same locations show zeroes.)  When I enable 10gbe (power domain 29, clock domain 50) and attempt to read locations starting @ 0x2F00000, u-boot will hang; i.e., I cannot read the 10Gbe identifier information and I have to reboot the H2K EVM.

Does this sound familiar to anyone?

Thanks,

Glen

  • 0
    Prodigy 70 points

    I notice that the Linux keystone-k2hk-clocks.dtsi define a number of clocks using "ti,keystone,psc-clock" with domain numbers that are not defined in the 66ak2h14.pdf datasheet. For example, power domains 17 and 18 are defined as "Reserved" in the datasheet table 11-6 but have clocks defined in the dtsi file:

        clkrac01: clkrac01 {
            #clock-cells = <0>;
            compatible = "ti,keystone,psc-clock";
            clocks = <&chipclk13>;
            clock-output-names = "rac-01";
            reg = <0x02350068 0xb00>, <0x02350044 0x400>;
            reg-names = "control", "domain";
            domain-id = <17>;
        };

        clkrac23: clkrac23 {
            #clock-cells = <0>;
            compatible = "ti,keystone,psc-clock";
            clocks = <&chipclk13>;
            clock-output-names = "rac-23";
            reg = <0x0235006c 0xb00>, <0x02350048 0x400>;
            reg-names = "control", "domain";
            domain-id = <18>;
        }

    A couple of questions: do any of the reserved clocks have anything to do with 10gbe?  Also, is there an update to the datasheet which specifies what all of the reserved clocks are?

  • 0 in reply to Glen%20Fujimori
    TI__Guru**** 161600 points
    Hi,

    See www.ti.com/.../spruhj5.pdf, specifically Section 2.1 Clock Control in the 10 Gigabit Ethernet Switch Subsystem User Guide.

    You will need to configure the MAIN PLL, see Section 11.5.1 Main PLL Controller Device-Specific Information from the Datasheet.

    Best Regards,
    Yordan
  • 0 in reply to Yordan Kovachev
    Prodigy 70 points

    Hello,

    I finally figured out what the problem was by reverse engineering the Linux code. The 10G submodule control register must enable the serdes ports before you can read any of the ethernet switch registers. You can close this.

    Thanks,

    Glen