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AM6548: How is the WKUP_LFOSC0 clock source enabled?

Part Number: AM6548

I am trying to understand how to properly enable the WKUP_LFOSC0 crystal clock source.

The AM65x datasheet states that "WKUP_LFOSC0 crystal clock source is disabled until software configures the oscillator and should be enabled after PORz_OUT, MCU_PORz_OUT reset release."

The TRM also states "By default, WKUP_LFOSC0, and HFOSC1 are disabled, while WKUP_HFOSC0 is enable after PORz."

However, looking at the CTRLMMR_WKUP_LFOSC_CTRL register the GZ bit (bit 7) description states "oscillator disable. when GZ=1 the both bypass and oscillation mode are disabled". But it appears that this bit is set to "0" by default / at reset, which sounds like it means this clock would be enabled rather than disabled by default. Is this a typo or am I misunderstanding the description? 

Is the GZ bit mentioned the only setting necessary to enable the WKUP_LFOSC0 clock? Our design directly uses a crystal rather than an external clock from an RTC like the EVM. How does this impact the software configuration? What needs to be implemented in software (if anything)?

Can you also provide more details regarding the RES_SEL and SW (oscillator gain adjustment) fields of the CTRLMMR_WKUP_LFOSC_CTRL register?

  • Hi Johnathan,

    Yes, there seems to be discrepancy in the AM65x TRM regarding WKUP_LFOSC GZ bit description. Per mine understanding, when GZ is 0 (default/reset value) WKUP_LFOSC is disabled, and you need to program 1 in this bit to enable the WKUP_LF0SC_CLK clock. You can verify that exporting WKUP_LF0SC_CLK to MCU_OBSCLK0 or OBSCLK0 pad and check if you will have 32KHz there when GZ bit is 1, and 0 KHz when GZ bit is 0.

    I will check also with TRM team and come back to you if they have something more.

    Regards,
    Pavel
  • Hello Pavel,

    We mapped WKUP_LFOSC_CLK to the OBSCLK0 pad and we found that it is actually enabled when we set the GZ bit to 0. When we set it to 1 the clock signal is disabled and no longer shows up on the oscilloscope. So it seems that this clock might be enabled by default? Something to check and possibly clarify in the documentation.

    Regards,

    John

  • John,

    Many thanks to your feedback. I will pass that info to the documentation team and expect these to be fixed in next version of AM65x TRM and DM.

    Regards,
    Pavel