AM3359: Custom board boot issue

Vamsi Siddhani
Part Number: AM3359
We've a custom board based on AM335x-EVM-Starter Kit.
SDK we're using is ti-processor-sdk-linux-am335x-evm-05.00.00.15.
We are facing the following issue.
Our board is not booting properly. sometimes it boots successfully without stuck anywhere. But some times booting abruptly stops and never completes booting.
It is also observed that sometimes unexpectedly it stops responding while we are working with the board.
To find out the issue, when we checked our hardware, the following observations were made:

VDAC voltage observed is 1.8v ( when booting happens successfully)
VDAC voltage observed is 2.3v ( when booting does not happen)

Please let us know what is causing this issue and kindly provide us with some solution.
Please find the part of our schematic attached for your reference. power_mgmt.pdf
It would be great help if you can make out what could be the issue and how to rectify it.

Looking forward for the response.
Regards
Vamsi
over 7 years ago
0 Biser Gatchev-XID over 7 years ago
TI__Guru**** 393215 points
From waht I see you have R392 and R395 marked as DNP. Please ensure that these I2C pullup resistors ARE populated, otherwise PMIC may not function properly.
0 Vamsi Siddhani over 7 years ago in reply to Biser Gatchev-XID
Expert 1420 points
Thanks Biser,
Those resistors are present.
Can you ask any software experts to kindly check the following boot log once and tell me what is causing the kernal crash issue sometimes.
6320.boot log.txt
Regards
Vamsi
0 Biser Gatchev-XID over 7 years ago in reply to Vamsi Siddhani
TI__Guru**** 393215 points
I don't see any boot log. Please repost it and also post the device tree file.
0 Vamsi Siddhani over 7 years ago in reply to Biser Gatchev-XID
Expert 1420 points
Please find the attached boot log and dts file below.
4530.boot log.txt
DTS:
Fullscreen 0310.am335x-evmsk.dts.txt Download
/*
 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

/*
 * AM335x Starter Kit
 * http://www.ti.com/tool/tmdssk3358
 */

/dts-v1/;

#include "am33xx.dtsi"
#include <dt-bindings/pwm/pwm.h>
#include <dt-bindings/interrupt-controller/irq.h>

/ {
	model = "TI AM335x EVM-SK";
	compatible = "ti,am335x-evmsk", "ti,am33xx";

	cpus {
		cpu@0 {
			cpu0-supply = <&vdd1_reg>;
		};
	};

	memory@80000000 {
		device_type = "memory";
		reg = <0x80000000 0x10000000>; /* 256 MB */
	};

	chosen {
		stdout-path = &uart0;
	};

	vbat: fixedregulator0 {
		compatible = "regulator-fixed";
		regulator-name = "vbat";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		regulator-boot-on;
	};

	lis3_reg: fixedregulator1 {
		compatible = "regulator-fixed";
		regulator-name = "lis3_reg";
		regulator-boot-on;
	};


	vtt_fixed: fixedregulator3 {
		compatible = "regulator-fixed";
		regulator-name = "vtt";
		regulator-min-microvolt = <1500000>;
		regulator-max-microvolt = <1500000>;
		gpio = <&gpio0 7 GPIO_ACTIVE_HIGH>;
		regulator-always-on;
		regulator-boot-on;
		enable-active-high;
	};


	//lcd_bl: backlight {
	//	compatible = "pwm-backlight";
	//	pwms = <&ecap2 0 50000 PWM_POLARITY_INVERTED>;
	//	brightness-levels = <0 58 61 66 75 90 125 170 255>;
	//	default-brightness-level = <8>;
	//};
	
	//sound {
	//	compatible = "simple-audio-card";
	//	simple-audio-card,name = "AM335x-EVMSK";
	//	simple-audio-card,widgets =
	//		"Headphone", "Headphone Jack";
	//	simple-audio-card,routing =
	//		"Headphone Jack",	"HPLOUT",
	//		"Headphone Jack",	"HPROUT";
	//	simple-audio-card,format = "dsp_b";
	//	simple-audio-card,bitclock-master = <&sound_master>;
	//	simple-audio-card,frame-master = <&sound_master>;
	//	simple-audio-card,bitclock-inversion;

	//	simple-audio-card,cpu {
	//		sound-dai = <&mcasp1>;
	//	};

	//	sound_master: simple-audio-card,codec {
	//		sound-dai = <&tlv320aic3106>;
	//		system-clock-frequency = <24000000>;
	//	};
	//};

	//panel {
	//	compatible = "ti,tilcdc,panel";
	//	pinctrl-names = "default", "sleep";
		//pinctrl-0 = <&lcd_pins_default>;
		//pinctrl-1 = <&lcd_pins_sleep>;
		//backlight = <&lcd_bl>;
	//	status = "okay";
	//	panel-info {
	///		ac-bias		= <255>;
	//		ac-bias-intrpt	= <0>;
	//		dma-burst-sz	= <16>;
	//		bpp		= <32>;
	//		fdd		= <0x80>;
	//		sync-edge	= <0>;
	//		sync-ctrl	= <1>;
	//		raster-order	= <0>;
	//		fifo-th		= <0>;
	//	};
	//	display-timings {
	//		480x272 {
	//			hactive		= <480>;
	//			vactive		= <272>;
	//			hback-porch	= <43>;
	//			hfront-porch	= <8>;
	//			hsync-len	= <4>;
	//			vback-porch	= <12>;
	//			vfront-porch	= <4>;
	//			vsync-len	= <10>;
	//			clock-frequency = <9000000>;
	//			hsync-active	= <0>;
	//			vsync-active	= <0>;
	//		};
	//	};
	//};
};

&am33xx_pinmux {
	pinctrl-names = "default";
	pinctrl-0 = <&ddr3_vtt_toggle>;

	ddr3_vtt_toggle: ddr3_vtt_toggle {
		pinctrl-single,pins = <
			0x164 (PIN_OUTPUT | MUX_MODE7)	/* ecap0_in_pwm0_out.gpio0_7 */
		>;
	};

	//emmc_reset: emmc_reset {
          //      pinctrl-single,pins = <
            //            0x07c (PIN_OUTPUT_PULLUP | MUX_MODE7)   /* gpmc_csn0.mmc1_rstn */
              //  >;
        //};

	lcd_pins_default: lcd_pins_default {
		pinctrl-single,pins = <
			//AM33XX_IOPAD(0x820, PIN_OUTPUT | MUX_MODE1)	/* gpmc_ad8.lcd_data23 */
			//AM33XX_IOPAD(0x824, PIN_OUTPUT | MUX_MODE1)	/* gpmc_ad9.lcd_data22 */
			//AM33XX_IOPAD(0x828, PIN_OUTPUT | MUX_MODE1)	/* gpmc_ad10.lcd_data21 */
			//AM33XX_IOPAD(0x82c, PIN_OUTPUT | MUX_MODE1)	/* gpmc_ad11.lcd_data20 */
			//AM33XX_IOPAD(0x830, PIN_OUTPUT | MUX_MODE1)	/* gpmc_ad12.lcd_data19 */
			//AM33XX_IOPAD(0x834, PIN_OUTPUT | MUX_MODE1)	/* gpmc_ad13.lcd_data18 */
			//AM33XX_IOPAD(0x838, PIN_OUTPUT | MUX_MODE1)	/* gpmc_ad14.lcd_data17 */
			//AM33XX_IOPAD(0x83c, PIN_OUTPUT | MUX_MODE1)	/* gpmc_ad15.lcd_data16 */
			AM33XX_IOPAD(0x8a0, PIN_OUTPUT | MUX_MODE0)	/* lcd_data0.lcd_data0 */
			AM33XX_IOPAD(0x8a4, PIN_OUTPUT | MUX_MODE0)	/* lcd_data1.lcd_data1 */
			AM33XX_IOPAD(0x8a8, PIN_OUTPUT | MUX_MODE0)	/* lcd_data2.lcd_data2 */
			AM33XX_IOPAD(0x8ac, PIN_OUTPUT | MUX_MODE0)	/* lcd_data3.lcd_data3 */
			AM33XX_IOPAD(0x8b0, PIN_OUTPUT | MUX_MODE0)	/* lcd_data4.lcd_data4 */
			AM33XX_IOPAD(0x8b4, PIN_OUTPUT | MUX_MODE0)	/* lcd_data5.lcd_data5 */
			AM33XX_IOPAD(0x8b8, PIN_OUTPUT | MUX_MODE0)	/* lcd_data6.lcd_data6 */
			AM33XX_IOPAD(0x8bc, PIN_OUTPUT | MUX_MODE0)	/* lcd_data7.lcd_data7 */
			AM33XX_IOPAD(0x8c0, PIN_OUTPUT | MUX_MODE0)	/* lcd_data8.lcd_data8 */
			AM33XX_IOPAD(0x8c4, PIN_OUTPUT | MUX_MODE0)	/* lcd_data9.lcd_data9 */
			AM33XX_IOPAD(0x8c8, PIN_OUTPUT | MUX_MODE0)	/* lcd_data10.lcd_data10 */
			AM33XX_IOPAD(0x8cc, PIN_OUTPUT | MUX_MODE0)	/* lcd_data11.lcd_data11 */
			AM33XX_IOPAD(0x8d0, PIN_OUTPUT | MUX_MODE0)	/* lcd_data12.lcd_data12 */
			AM33XX_IOPAD(0x8d4, PIN_OUTPUT | MUX_MODE0)	/* lcd_data13.lcd_data13 */
			AM33XX_IOPAD(0x8d8, PIN_OUTPUT | MUX_MODE0)	/* lcd_data14.lcd_data14 */
			AM33XX_IOPAD(0x8dc, PIN_OUTPUT | MUX_MODE0)	/* lcd_data15.lcd_data15 */
			//AM33XX_IOPAD(0x8e0, PIN_OUTPUT | MUX_MODE0)	/* lcd_vsync.lcd_vsync */
			//AM33XX_IOPAD(0x8e4, PIN_OUTPUT | MUX_MODE0)	/* lcd_hsync.lcd_hsync */
			//AM33XX_IOPAD(0x8e8, PIN_OUTPUT | MUX_MODE0)	/* lcd_pclk.lcd_pclk */
			//AM33XX_IOPAD(0x8ec, PIN_OUTPUT | MUX_MODE0)	/* lcd_ac_bias_en.lcd_ac_bias_en */
		>;
	};

	lcd_pins_sleep: lcd_pins_sleep {
		pinctrl-single,pins = <
			//AM33XX_IOPAD(0x820, PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_ad8.lcd_data23 */
			//AM33XX_IOPAD(0x824, PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_ad9.lcd_data22 */
			//AM33XX_IOPAD(0x828, PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_ad10.lcd_data21 */
			//AM33XX_IOPAD(0x82c, PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_ad11.lcd_data20 */
			//AM33XX_IOPAD(0x830, PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_ad12.lcd_data19 */
			//AM33XX_IOPAD(0x834, PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_ad13.lcd_data18 */
			//AM33XX_IOPAD(0x838, PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_ad14.lcd_data17 */
			//AM33XX_IOPAD(0x83c, PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_ad15.lcd_data16 */
			AM33XX_IOPAD(0x8a0, PULL_DISABLE | MUX_MODE7)	/* lcd_data0.lcd_data0 */
			AM33XX_IOPAD(0x8a4, PULL_DISABLE | MUX_MODE7)	/* lcd_data1.lcd_data1 */
			AM33XX_IOPAD(0x8a8, PULL_DISABLE | MUX_MODE7)	/* lcd_data2.lcd_data2 */
			AM33XX_IOPAD(0x8ac, PULL_DISABLE | MUX_MODE7)	/* lcd_data3.lcd_data3 */
			AM33XX_IOPAD(0x8b0, PULL_DISABLE | MUX_MODE7)	/* lcd_data4.lcd_data4 */
			AM33XX_IOPAD(0x8b4, PULL_DISABLE | MUX_MODE7)	/* lcd_data5.lcd_data5 */
			AM33XX_IOPAD(0x8b8, PULL_DISABLE | MUX_MODE7)	/* lcd_data6.lcd_data6 */
			AM33XX_IOPAD(0x8bc, PULL_DISABLE | MUX_MODE7)	/* lcd_data7.lcd_data7 */
			AM33XX_IOPAD(0x8c0, PULL_DISABLE | MUX_MODE7)	/* lcd_data8.lcd_data8 */
			AM33XX_IOPAD(0x8c4, PULL_DISABLE | MUX_MODE7)	/* lcd_data9.lcd_data9 */
			AM33XX_IOPAD(0x8c8, PULL_DISABLE | MUX_MODE7)	/* lcd_data10.lcd_data10 */
			AM33XX_IOPAD(0x8cc, PULL_DISABLE | MUX_MODE7)	/* lcd_data11.lcd_data11 */
			AM33XX_IOPAD(0x8d0, PULL_DISABLE | MUX_MODE7)	/* lcd_data12.lcd_data12 */
			AM33XX_IOPAD(0x8d4, PULL_DISABLE | MUX_MODE7)	/* lcd_data13.lcd_data13 */
			AM33XX_IOPAD(0x8d8, PULL_DISABLE | MUX_MODE7)	/* lcd_data14.lcd_data14 */
			AM33XX_IOPAD(0x8dc, PULL_DISABLE | MUX_MODE7)	/* lcd_data15.lcd_data15 */
			//AM33XX_IOPAD(0x8e0, PIN_INPUT_PULLDOWN | MUX_MODE7)	/* lcd_vsync.lcd_vsync */
			//AM33XX_IOPAD(0x8e4, PIN_INPUT_PULLDOWN | MUX_MODE7)	/* lcd_hsync.lcd_hsync */
			//AM33XX_IOPAD(0x8e8, PIN_INPUT_PULLDOWN | MUX_MODE7)	/* lcd_pclk.lcd_pclk */
			//AM33XX_IOPAD(0x8ec, PIN_INPUT_PULLDOWN | MUX_MODE7)	/* lcd_ac_bias_en.lcd_ac_bias_en */
		>;
	};

	i2c0_pins: pinmux_i2c0_pins {
		pinctrl-single,pins = <
			AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c0_sda.i2c0_sda */
			AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c0_scl.i2c0_scl */
		>;
	};

	uart0_pins: pinmux_uart0_pins {
		pinctrl-single,pins = <
			AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0)	/* uart0_rxd.uart0_rxd */
			AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* uart0_txd.uart0_txd */
		>;
	};

	uart1_pins: pinmux_uart1_pins {
		pinctrl-single,pins = <
			AM33XX_IOPAD(0x978, PIN_INPUT_PULLUP | MUX_MODE0)	/* uart1_ctsn.uart1_ctsn */
			AM33XX_IOPAD(0x97C, PIN_OUTPUT_PULLUP | MUX_MODE0)	/* uart1_rtsn.uart1_rtsn */
			AM33XX_IOPAD(0x980, PIN_INPUT_PULLUP | MUX_MODE0)	/* uart1_rxd.uart1_rxd */
			AM33XX_IOPAD(0x984, PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* uart1_txd.uart1_txd */
		>;
	};

	cpsw_default: cpsw_default {
		pinctrl-single,pins = <
			/* Slave 1 */
			AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txen.rgmii1_tctl */
			AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxdv.rgmii1_rctl */
			AM33XX_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd3.rgmii1_td3 */
			AM33XX_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd2.rgmii1_td2 */
			AM33XX_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd1.rgmii1_td1 */
			AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd0.rgmii1_td0 */
			AM33XX_IOPAD(0x92c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txclk.rgmii1_tclk */
			AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxclk.rgmii1_rclk */
			AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd3.rgmii1_rd3 */
			AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd2.rgmii1_rd2 */
			AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd1.rgmii1_rd1 */
			AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd0.rgmii1_rd0 */

			/* Slave 2 */
			AM33XX_IOPAD(0x840, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a0.rgmii2_tctl */
			AM33XX_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a1.rgmii2_rctl */
			AM33XX_IOPAD(0x848, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a2.rgmii2_td3 */
			AM33XX_IOPAD(0x84c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a3.rgmii2_td2 */
			AM33XX_IOPAD(0x850, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a4.rgmii2_td1 */
			AM33XX_IOPAD(0x854, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a5.rgmii2_td0 */
			AM33XX_IOPAD(0x858, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a6.rgmii2_tclk */
			AM33XX_IOPAD(0x85c, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a7.rgmii2_rclk */
			AM33XX_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a8.rgmii2_rd3 */
			AM33XX_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a9.rgmii2_rd2 */
			AM33XX_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a10.rgmii2_rd1 */
			AM33XX_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a11.rgmii2_rd0 */
		>;
	};

	cpsw_sleep: cpsw_sleep {
		pinctrl-single,pins = <
			/* Slave 1 reset value */
			AM33XX_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)

			/* Slave 2 reset value*/
			AM33XX_IOPAD(0x840, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x848, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x84c, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x850, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x854, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x858, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x85c, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE7)
		>;
	};

	davinci_mdio_default: davinci_mdio_default {
		pinctrl-single,pins = <
			/* MDIO */
			AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)	/* mdio_data.mdio_data */
			AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0)			/* mdio_clk.mdio_clk */
		>;
	};

	davinci_mdio_sleep: davinci_mdio_sleep {
		pinctrl-single,pins = <
			/* MDIO reset value */
			AM33XX_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
		>;
	};

	mmc1_pins: pinmux_mmc1_pins {
		pinctrl-single,pins = <
			AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE7) 		/* spi0_cs1.gpio0_6 */
			AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_dat0.mmc0_dat0 */
			AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_dat1.mmc0_dat1 */
			AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_dat2.mmc0_dat2 */
			AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_dat3.mmc0_dat3 */
			AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_cmd.mmc0_cmd */
			AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_clk.mmc0_clk */
			//AM33XX_IOPAD(0x9a0, PIN_INPUT | MUX_MODE7)		/* mcasp0_aclkr.mmc0_sdwp */
		>;
	};


	mmc2_pins: pinmux_mmc2_pins {
		pinctrl-single,pins = <
			AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE1)	/* gpmc_ad0.mmc1_dat0 */
			AM33XX_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2) 	/* gpmc_csn1.mmc1_clk */
			AM33XX_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2) 	/* gpmc_csn2.mmc1_cmd */
			//AM33XX_IOPAD(0x820, PIN_INPUT_PULLUP | MUX_MODE2)	/* gpmc_ad8.mmc1_dat0 */
			//AM33XX_IOPAD(0x824, PIN_INPUT_PULLUP | MUX_MODE2)	/* gpmc_ad9.mmc1_dat1 */
			//AM33XX_IOPAD(0x828, PIN_INPUT_PULLUP | MUX_MODE2)	/* gpmc_ad10.mmc1_dat2 */
			//AM33XX_IOPAD(0x82c, PIN_INPUT_PULLUP | MUX_MODE2)	/* gpmc_ad11.mmc1_dat3 */
			//AM33XX_IOPAD(0x830, PIN_INPUT_PULLUP | MUX_MODE2)	/* gpmc_ad12.mmc1_dat4 */
			//AM33XX_IOPAD(0x834, PIN_INPUT_PULLUP | MUX_MODE2)	/* gpmc_ad13.mmc1_dat5 */
			//AM33XX_IOPAD(0x838, PIN_INPUT_PULLUP | MUX_MODE2)	/* gpmc_ad14.mmc1_dat6 */
			//AM33XX_IOPAD(0x83c, PIN_INPUT_PULLUP | MUX_MODE2)	/* gpmc_ad15.mmc1_dat7 */
			//AM33XX_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2) 	/* gpmc_csn1.mmc1_clk */
			//AM33XX_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2) 	/* gpmc_csn2.mmc1_cmd */
			//AM33XX_IOPAD(0x87c, PIN_OUTPUT_PULLUP | MUX_MODE7) 	/* gpmc_csn0.mmc1_rstn */
			//AM33XX_IOPAD(0x888, PIN_INPUT_PULLUP | MUX_MODE7) 	/* gpmc_csn3.mmc1_ds */
		>;
	};	

	gpmc_pins: pinmux_gpmc_pins {
		pinctrl-single,pins = <
			//AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad0.gpmc_ad0 */
			AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad1.gpmc_ad1 */
			AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad2.gpmc_ad2 */
			AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad3.gpmc_ad3 */
			AM33XX_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad4.gpmc_ad4 */
			AM33XX_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad5.gpmc_ad5 */
			AM33XX_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad6.gpmc_ad6 */
			AM33XX_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad7.gpmc_ad7 */
			AM33XX_IOPAD(0x824, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad9.mmc1_dat1 */
			AM33XX_IOPAD(0x894, PIN_OUTPUT | MUX_MODE0) 	/* gpmc_OEn_REn.gpmc_OEn_REn */
			AM33XX_IOPAD(0x890, PIN_OUTPUT | MUX_MODE0) 	/* gpmc_ADVn_ALE.gpmc_ADVn_ALE */
			AM33XX_IOPAD(0x89c, PIN_OUTPUT | MUX_MODE0)	/* gpmc_BEn0_CLE.gpmc_BEn0_CLE */
			AM33XX_IOPAD(0x898, PIN_OUTPUT | MUX_MODE0)	/* GPMC_WEn.GPMC_WEn */
			//AM33XX_IOPAD(0x07c, PIN_OUTPUT | MUX_MODE0)	/* gpmc_csn0 */
			//AM33XX_IOPAD(0x9B0, PIN_INPUT_PULLUP | MUX_MODE7)	/* XDMA_EVENT_INTR0.AM335X_LOC1 */
			//AM33XX_IOPAD(0x9B4, PIN_INPUT_PULLUP | MUX_MODE0)	/* XDMA_EVENT_INTR1.AM335X_LOC2 */
		>;
	};	
	
	spi0_pins: spi0_pins {
		pinctrl-single,pins = <
			AM33XX_IOPAD(0x950, PIN_INPUT_PULLUP  | MUX_MODE0) 	//spi0_sclk
			AM33XX_IOPAD(0x954, PIN_OUTPUT | MUX_MODE0) 		//spi0_d0
			AM33XX_IOPAD(0x958, PIN_INPUT  | MUX_MODE0)		//spi0_d1
			AM33XX_IOPAD(0x95c, PIN_OUTPUT_PULLUP | MUX_MODE0)	//spi0_cs0
		>;
	};

	spi1_pins: spi1_pins {
		pinctrl-single,pins = <
			AM33XX_IOPAD(0x908, PIN_INPUT | MUX_MODE2)	/* mii1_col.spi1_sclk */
			AM33XX_IOPAD(0x90c, PIN_OUTPUT | MUX_MODE2)   	/* mii1_crs.spi1_d0 */
			AM33XX_IOPAD(0x910, PIN_INPUT | MUX_MODE2) 	/* mii1_rxerr.spi1_d1 */
			AM33XX_IOPAD(0x99c, PIN_OUTPUT | MUX_MODE3)	/* mcasp0_ahclkr.spi1_cs0 */
		>;
	};
};

&uart0 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart0_pins>;

	status = "okay";
};

&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart1_pins>;

	status = "okay";
};

&spi0 {
    status = "okay";
    pinctrl-names = "default";
    pinctrl-0 = <&spi0_pins>;
    ti,pindir-d0-out-d1-in = <1>;

    spi_nor: flash@0 {
        #address-cells = <1>;
        #size-cells = <1>;
        #compatible = "jedec,spi-nor";
	compatible = "jedec,spi-nor";
        spi-max-frequency = <3000000>;
        m25p,fast-read;
        reg = <0>;

        //partition@0 {
            //label = "u-boot-spl";
            //reg = <0x0 0x80000>;
            ////read-only;
        //};

        //partition@1 {
            //label = "u-boot";
            //reg = <0x80000 0x100000>;
            ////read-only;
        //};

        //partition@2 {
            //label = "u-boot-env";
            //reg = <0x180000 0x20000>;
            ////read-only;
        //};

        partition@0 {
            label = "MasterSlaveWrite";
            //reg = <0x1A0000 0x1E60000>;
	    reg = <0x0 0x1E60000>;
        };
    };
};

&gpmc
{
	pinctrl-names = "default";
	pinctrl-0 = <&gpmc_pins>;
	ranges = <2 0 0x01000000 0x01000000>; /* fpga */
	status = "okay";
	fpga{
		#address-cells = <1>;
		#size-cells = <1>;
		reg = <2 0 0x01000000>;
		bank-width = <2>;

		gpmc,sync-clk-ps=<0>; /* Minimum clock period for synchronous mode, in picoseconds */

		gpmc,cs-on-ns = <0>;		/* Assertion time */
		gpmc,cs-rd-off-ns = <10>;	/* Read deassertion time */
		gpmc,cs-wr-off-ns = <6>;	/* Write deassertion time */

		/* ADV signal timings (in nanoseconds) corresponding to GPMC_CONFIG3: */
		gpmc,adv-on-ns = <1>;		/* Assertion time */
		gpmc,adv-rd-off-ns = <1>;	/* Read deassertion time */
		gpmc,adv-wr-off-ns = <1>;	/* Write deassertion time */

		/* WE signals timings (in nanoseconds) corresponding to GPMC_CONFIG4: */
		gpmc,we-on-ns = <1>;		/* Assertion time */
		gpmc,we-off-ns = <1>;		/* Deassertion time */

		/* OE signals timings (in nanoseconds) corresponding to GPMC_CONFIG4: */
		gpmc,oe-on-ns = <3>;		/* Assertion time */
		gpmc,oe-off-ns = <10>;		/* Deassertion time */

		/* Access time and cycle time timings (in nanoseconds) corresponding to GPMC_CONFIG5: */
		gpmc,access-ns = <9>;			/* Start-cycle to first data valid delay */
		gpmc,page-burst-access-ns = <1>;	/* Multiple access word delay */
		gpmc,rd-cycle-ns = <9>;			/* Total read cycle time */
		gpmc,wr-cycle-ns = <6>;			/* Total write cycle time */


		gpmc,burst-length= <8>; 	//	Page/burst length. Must be 4, 8 or 16.
		gpmc,burst-wrap;		//	Enables wrap bursting
		gpmc,burst-read; 		//	Enables read page/burst mode
		gpmc,burst-write;		//	Enables write page/burst mode

		gpmc,device-width=<1>;/* Total width of device(s) connected to a GPMC chip-select in bytes. The GPMC supports 8-bit and 16-bit devices 						and so this property must be 1 or 2. */

		//gpmc,sync-read;
		//gpmc,sync-write;

	};
};

&spi1
{
	pinctrl-names = "default";
	pinctrl-0 = <&spi1_pins>;
	ti,pindir-d0-out-d1-in = <1>;
	status = "okay";
	spidev@1
	{
		pinctrl-0 = <&spi1_pins>;
		compatible = "spidev";
		spi-max-frequency = <48000000>;
		reg = <0>;
	};
};

&i2c0 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c0_pins>;

	status = "okay";
	clock-frequency = <400000>;

	tps: tps@2d {
		reg = <0x2d>;
	};

	lis331dlh: lis331dlh@18 {
		compatible = "st,lis331dlh", "st,lis3lv02d";
		reg = <0x18>;
		Vdd-supply = <&lis3_reg>;
		Vdd_IO-supply = <&lis3_reg>;

		st,click-single-x;
		st,click-single-y;
		st,click-single-z;
		st,click-thresh-x = <10>;
		st,click-thresh-y = <10>;
		st,click-thresh-z = <10>;
		st,irq1-click;
		st,irq2-click;
		st,wakeup-x-lo;
		st,wakeup-x-hi;
		st,wakeup-y-lo;
		st,wakeup-y-hi;
		st,wakeup-z-lo;
		st,wakeup-z-hi;
		st,min-limit-x = <120>;
		st,min-limit-y = <120>;
		st,min-limit-z = <140>;
		st,max-limit-x = <550>;
		st,max-limit-y = <550>;
		st,max-limit-z = <750>;
	};

	tlv320aic3106: tlv320aic3106@1b {
		#sound-dai-cells = <0>;
		compatible = "ti,tlv320aic3106";
		reg = <0x1b>;
		status = "okay";

		/* Regulators */
		AVDD-supply = <&vaux2_reg>;
		IOVDD-supply = <&vaux2_reg>;
		DRVDD-supply = <&vaux2_reg>;
		DVDD-supply = <&vbat>;
	};
};

&usb {
	status = "disabled";
};

&usb_ctrl_mod {
	status = "disabled";
};

&usb0_phy {
	status = "disabled";
};

//&usb1_phy {
//	status = "disabled";
//};

&usb0 {
	status = "disabled";
};

//&usb1 {
//	status = "disabled";
//	dr_mode = "host";
//};

&cppi41dma  {
	status = "okay";
};

&epwmss2 {
	status = "okay";

	ecap2: ecap@48304100 {
		status = "okay";
		pinctrl-names = "default";
		//pinctrl-0 = <&ecap2_pins>;
	};
};

&wkup_m3_ipc {
	ti,needs-vtt-toggle;
	ti,vtt-gpio-pin = <7>;
	ti,scale-data-fw = "am335x-evm-scale-data.bin";
};

#include "tps65910.dtsi"

&tps {
	vcc1-supply = <&vbat>;
	vcc2-supply = <&vbat>;
	vcc3-supply = <&vbat>;
	vcc4-supply = <&vbat>;
	vcc5-supply = <&vbat>;
	vcc6-supply = <&vbat>;
	vcc7-supply = <&vbat>;
	vccio-supply = <&vbat>;

	regulators {
		vrtc_reg: regulator@0 {
			regulator-always-on;
		};

		vio_reg: regulator@1 {
			regulator-always-on;
		};

		vdd1_reg: regulator@2 {
			/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
			regulator-name = "vdd_mpu";
			regulator-min-microvolt = <912500>;
			regulator-max-microvolt = <1351500>;
			regulator-boot-on;
			regulator-always-on;
		};

		vdd2_reg: regulator@3 {
			/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
			regulator-name = "vdd_core";
			regulator-min-microvolt = <912500>;
			regulator-max-microvolt = <1150000>;
			regulator-boot-on;
			regulator-always-on;
		};

		vdd3_reg: regulator@4 {
			regulator-always-on;
		};

		vdig1_reg: regulator@5 {
			regulator-always-on;
		};

		vdig2_reg: regulator@6 {
			regulator-always-on;
		};

		vpll_reg: regulator@7 {
			regulator-always-on;
		};

		vdac_reg: regulator@8 {
			regulator-always-on;
		};

		vaux1_reg: regulator@9 {
			regulator-always-on;
		};

		vaux2_reg: regulator@10 {
			regulator-always-on;
		};

		vaux33_reg: regulator@11 {
			regulator-always-on;
		};

		vmmc_reg: regulator@12 {
			regulator-min-microvolt = <3300000>;
			regulator-max-microvolt = <3300000>;
			gpio = <&gpio1 29 GPIO_ACTIVE_HIGH>;
			enable-active-high;
			regulator-always-on;
			regulator-boot-on;
		};
	};
};

&mac {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&cpsw_default>;
	pinctrl-1 = <&cpsw_sleep>;
	dual_emac = <1>;
	status = "okay";
};

&davinci_mdio {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&davinci_mdio_default>;
	pinctrl-1 = <&davinci_mdio_sleep>;
	status = "okay";
};

&cpsw_emac0 {
	phy_id = <&davinci_mdio>, <0>;
	phy-mode = "rgmii-txid";
	dual_emac_res_vlan = <1>;
};

&cpsw_emac1 {
	phy_id = <&davinci_mdio>, <5>;
	phy-mode = "rgmii-txid";
	dual_emac_res_vlan = <2>;
};

&mmc1 {
	status = "okay";
	vmmc-supply = <&vmmc_reg>;
	bus-width = <4>;
	pinctrl-names = "default";
	pinctrl-0 = <&mmc1_pins>;
	//cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
};

&sham {
	status = "okay";
};

&aes {
	status = "okay";
};

&gpio0 {
	status = "okay";
	ti,no-reset-on-init;
};

&mmc2 {
	status = "okay";
	vmmc-supply = <&vmmc_reg>;
	ti,non-removable;
	bus-width = <1>;
	pinctrl-names = "default";
	pinctrl-0 = <&mmc2_pins>;

};

&tscadc {
	status = "okay";
	tsc {
		ti,wires = <4>;
		ti,x-plate-resistance = <200>;
		ti,coordinate-readouts = <5>;
		ti,wire-config = <0x00 0x11 0x22 0x33>;
	};
};

&lcdc {
	status = "okay";

	blue-and-red-wiring = "crossed";
};

//&sgx {
//	status = "okay";
//};

&rtc {
	clocks = <&clk_32768_ck>, <&clkdiv32k_ick>;
	clock-names = "ext-clk", "int-clk";
};

&pruss_soc_bus {
	status = "okay";

	pruss: pruss@0 {
		status = "okay";
	};
};
Regards
Vamsi
0 Kemal R. Shakir over 7 years ago in reply to Vamsi Siddhani
TI__Guru 55345 points
Hello Vamsi,

Please, replace the compatible = "spidev"; with compatible = "rohm,dh2228fv"; in your dts and check if the crashes disappear.

Best regards,
Kemal
0 Kemal R. Shakir over 7 years ago in reply to Kemal R. Shakir
TI__Guru 55345 points
Hello Vamsi,

Does the above comment helped you to resolve this issue?

Best regards,
Kemal
Processors

Processors forum

AM3359: Custom board boot issue
