AMIC110: PWRONRSTn release timing

Kz777

Part Number: AMIC110

Hi Champs,

Do we have any requirement between 1.1V line rise up and PWRONRSTn rise up timing Or Do we have any other requirement for PWRONRSTn pin ?

over 7 years ago

0 Biser Gatchev-XID over 7 years ago

TI__Guru**** 393215 points

Hi,

All power supplies must have ramped-up and stabilized, and the main oscillator clock must be running and stabilized, before PORz is released. See Table 6-3 and Figure 6-10 in the AMIC110 datasheet.

0 Kz777 over 7 years ago in reply to Biser Gatchev-XID

TI__Expert 7895 points

Hi, they doesn't use RTC mode. So, I list up "RTC Feature Disabled" power sequence.
So, do we have any requirement during an arrow period at attached picture ?

0 Biser Gatchev-XID over 7 years ago in reply to Kz777

TI__Guru**** 393215 points

Please see Table 6-3 and Figure 6-10 in the AMIC110 datasheet. You will notice that the main oscillator OSC0 begins to ramp-up after VDD_CORE has ramped-up and stabilized. The typical startup time tsx for OSC0 is 1.5ms. So PORz must be released at least after this time. Recommended PMICs release reset after a much longer time (e.g. default time for TPS65217C is 20ms after VDD_CORE has ramped-up and stabilized).

0 Kz777 over 7 years ago in reply to Biser Gatchev-XID

TI__Expert 7895 points

Hi ,
Could you please tell us why we don't set t_sX max value ?

0 Biser Gatchev-XID over 7 years ago in reply to Kz777

TI__Guru**** 393215 points

There is no tsx max. value. This parameter is not characterized, because it also depends on external components.

0 Kz777 over 7 years ago in reply to Biser Gatchev-XID

TI__Expert 7895 points

Hi Champs,

My customer request us what is detail "external components" use case. So, Could you please explain this contents ?

Regards,

Kz777

0 Biser Gatchev-XID over 7 years ago in reply to Kz777

TI__Guru**** 393215 points

Crystal, capacitors, resistors - all components included in the OSC circuit.

0 Kz777 over 7 years ago in reply to Biser Gatchev-XID

TI__Expert 7895 points

Hi ,
Thanks. One more things, Is the most affect componets a crystal ,right ? This "MAX" limit affect by crystal circuit performance so we can't define , correct ?

0 Biser Gatchev-XID over 7 years ago in reply to Kz777

TI__Guru**** 393215 points

Yes.

0 Kz777 over 7 years ago in reply to Biser Gatchev-XID

TI__Expert 7895 points

Hi ,

We have some feed back.
Customer didn't understand why external crystal circuit affect this "max" parameter yet.
This "Max" limit is a time that is stable crystal output.

Could you please more information about this reason ?

0 Biser Gatchev-XID over 7 years ago in reply to Kz777

TI__Guru**** 393215 points

I think I already explained this here: e2e.ti.com/.../2968187 We do not have any other information available.

0 Kz777 over 7 years ago in reply to Biser Gatchev-XID

TI__Expert 7895 points

We should discuss this topic internal.

0 Biser Gatchev-XID over 7 years ago in reply to Kz777

TI__Guru**** 393215 points

Please contact the Sitara BU. I am an external employee.

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AMIC110: PWRONRSTn release timing