Linux/AM5728: PCIe Trouble Detecting

Lawrence Wong

Part Number: AM5728

Tool/software: Linux

Customer has AM5728 in design. Currently they have an issue detecting PCIe bus from a device. PCIe bus is detected at AM5728 okay; however, PCIe bus at the device side is not.

The device is out of reset and transmits the PCIe bus constantly to CPU (it is CPU_PCIE_RX) approximately 20ms prior to CPU to scan the PCIe bus once (CPU_PCIE_TX). The design provides external PCIe 100MHz clock, LP-HCSL output format to both AM5728 and the device.

Any suggestion?

over 6 years ago

0 Biser Gatchev-XID over 6 years ago

TI__Guru**** 393215 points

Please post which Linux version is used.

0 Rex Chang over 6 years ago in reply to Biser Gatchev-XID

TI__Guru 50170 points

Hi, Lawrence,

Is the AM5728 the Root Complex? Are you saying that lspci only shows the TI bridge, but not the end point device?
Could customer check what state is the LTSSM_STATE ? Is it toggling between 0 and 1?

Rex

0 Lawrence Wong over 6 years ago in reply to Rex Chang

TI__Genius 16030 points

They are using PSDK v3.03

Yes it only shows the TI Bridge

0 Lawrence Wong over 6 years ago in reply to Lawrence Wong

TI__Genius 16030 points

Additional information:

Trying to manually set the LTSSM_EN (this was done in the kernel driver).
See the LTSSM register value going through 0x45-> 0x41 -> 0x19 ->0x45 ->0x11->0x45, etc.
And the link status stays up:
devmem 0x5100210C
0x00010000

But the pci device is still not detected.
root@j6 ~]# lspci
00:00.0 Class 0604: Device 104c:8888 (rev 01)
[root@j6 ~]#

0 Rex Chang over 6 years ago in reply to Lawrence Wong

TI__Guru 50170 points

Hi, Lawrence,

Does the EP comes up before RC? In many cases, we noticed similar issues are caused by EP not coming up before RC which is described in the PCIe EP verification in PCIe EP Guide,
software-dl.ti.com/.../Foundational_Components_Kernel_Drivers.html

Rex

0 Lawrence Wong over 6 years ago in reply to Rex Chang

TI__Genius 16030 points

Hi Rex,

Question 1)

Per earlier response, LTSSM_STATE goes through 0x45-> 0x41 -> 0x19 ->0x45 ->0x11->0x45, repeatedly. And each time reading the register, PCIECTRL_TI_CONF_PHY_CS (0X5100210C), it toggles 0 to 1 or 1 to 0 repeatedly, does that mean the PCIe link up is not stable ?

Also they tried LTSSM_EN pint set 0x1 for Enable the link training in the Kernel at end of PCIe init sequence; however, when the board boots up, the LTSSM_EN is reset (changed from 0x1 to 0x0); therefore, we reset to 0x1 manually after booting up from kernel each time in order to change LTSSM_STATE.

Do you know what would reset the LTSSM_EN pin to 0x0 ?

Question 2)

In addition to drive PCIe master clock to the end point device for debug purpose,

Please verify the following to get the PCIe clock generator from the AM5728 to configure ACSPCIE to be in output mode which CPU generate master PCIe clock to end point device.

· The register, CM_CLKMODE_APLL_PCIE (0x4A00821C) set bit REFSEL to 0x1 for APLL reference input clock is from ADPLL.

· The register, CTRL_CORE_SMA_SW_6 (0x4A003C14) set bit PCIE_TX_RX_CONTROL to 0x1 for ACSPCIe TX Mode

Regards,

Lawrence

0 Rex Chang over 6 years ago in reply to Lawrence Wong

TI__Guru 50170 points

Hi, Lawrence,

No, the PCIe link isn't even up. Please see TRM for LTSSM_STATE values. When PCIe link is up, it should be at L0 sate, 0x11. 0x0 and 0x1 are not up state. It is still at detect states.

Please also see TRM page 936. The REFSEL 0x1 is taking clock from ACSPCIE. 0x0 is input clock from ADPLL.
To configure ACSPCIE to putput clock to ljcb_clkp/n, only need to configure CTRL_CORE_SMA_SW_6 to be TX mode.

Rex

0 Rex Chang over 6 years ago in reply to Rex Chang

TI__Guru 50170 points

Hi, Lawrence,

Just update here that we'll try the same EP on AM5728 EVM.

Rex

0 Rex Chang over 6 years ago in reply to Rex Chang

TI__Guru 50170 points

Update the status that trying to get the same EP card to test.

0 Lawrence Wong over 6 years ago in reply to Rex Chang

TI__Genius 16030 points

Rex,

Customer is looking to debug this themselves. They have access to an eval board with a min-PCIe connector but it physically will not fit on the AM57x EVM mini-PCIe slot. Is there an extender that you recommend?

Regards,

Lawrence

0 Rex Chang over 6 years ago in reply to Lawrence Wong

TI__Guru 50170 points

Hi, Lawrence,

Please take a look at the PLSDK Kernel Drivers Guide for PCIe Endpoint

http://software-dl.ti.com/processor-sdk-linux/esd/docs/latest/linux/Foundational_Components_Kernel_Drivers.html#pcie-end-point

I think this is the info you are looking for:

Note

For AM572x GP EVM, there is a Mini PCIe connector on the LCD board. To connect 2 boards involving a AM572x GP EVM, a mPCIe-to-PCIe adapter is needed.

For AM65x boards, remove any jumpers present in the SERDES card when operating in endpoint mode.

../_images/MPCIe-to-PCIe_Adapter.jpg

0 Lawrence Wong over 6 years ago in reply to Rex Chang

TI__Genius 16030 points

What is the part number for this? I cannot read it

0 Rex Chang over 6 years ago in reply to Lawrence Wong

TI__Guru 50170 points

Hi, Lawrence,

Search internet for mini-PCIe to PCIe adapter, you should be able to find one look the same as the picture shown in PCIe Endpoint User's Guide.

Here is one I found https://www.aliexpress.com/item/Mini-PCI-E-to-PCI-E-x1-pci-Express-1X-Extension-Cord-mini-pcie-to-pcie/32722871660.html

Rex

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Linux/AM5728: PCIe Trouble Detecting