TMS320C6678: Memory mapping of CorePac registers

Hi John,

CorePack Registers are described in the C66x CorePac User's Guide:
www.ti.com/.../sprugw0c.pdf

Also the CPU and Instruction set could be of use to you:
www.ti.com/.../sprugh7.pdf

Best Regards,
Yordan

I have looked at both of those documents and they do not have specific memory addresses for the core registers.

Then you can use CCS to connect to a Core (via Jtag) and view it's registers contents:

  

Best Regards,
Yordan

My problem occurs in the field on rare occasions when connecting with CCS is not an option. What I want is to be able to log the register contents for a core that is not operating correctly via one that is. As I stated in the original post, I want to have core 0 read the PC register on core 3 so that it can be logged for the purpose of finding what the rogue core is doing.

Ok, let me consult the design team. As far as I know this happens through the linker.cmd file and I am not sure if those register offsets are so clearly defined in the documentation.

Best Regards,
Yordan

From the documentation it appears the registers are memory mapped. Is there somewhere that I can find what the addresses are for each register so I could simply do a memcpy and know which is which or do I need to copy each register I am interested individually?