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DM335 EMIF width



Hi,

I have question about DM335 EMIF's width. There are three sentences:

1. Datasheet SPRS528B -
  "3.12 Device Boot Modes.
  The DM335 ARM can boot from either Async EMIF (AEMIF/OneNand) or from ARM ROM..."

2. Datasheet SPRS528B -
  "5.7.1.2 OneNAND.
  The OneNAND features supported are as follows.
  ...Only 16-bit data bus widths"

3. "Asynchronous External Memory Interface (EMIF)", SPRUFZ1 -
  "2.6 Program Execution.
  ...When executing code from the EMIF, the bus width must be configured to be an 8-bit data bus."

Which of this sentences are wrong?

  • VT said:
    3. "Asynchronous External Memory Interface (EMIF)", SPRUFZ1 -
      "2.6 Program Execution.
      ...When executing code from the EMIF, the bus width must be configured to be an 8-bit data bus."

    This is believed to be incorrect as it makes the least sense, I actually came across this a few months back and came to the conclusion that the EMIF manual statement was incorrect, though it is still pending verification through design and a fix to the EMIF manual. In general when the CPU fetches data on the internal bus the EMIF will automatically handle the width of the bus for you, so for a 32 bit read for an instruction it would make 2 accesses for 16 bit, and 4 accesses for 8 bit. Unfortunately I do not have the hardware to verify this one way or the other, but I suspect code will properly execute with the bus in 16 bit mode.