Dear Champs,
I found the CK and ADDR_CTRL net classes should be routed similarly and be lengh matched to minimize skew between them, and I think this restriction is for the routing between TDA3 and DDR3 memories.
But, I'm not sure if this restriction is also applied between DDR3 and termination regulators, and the lines between DDR3 and termination regulators should be matched.
Could you please let me know the restrictions of the lines between DDR3 and termination regulators?
Thanks and Best Regards,
SI.