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CCS/TMS320VC5509A: McBSP read problem

Part Number: TMS320VC5509A

Tool/software: Code Composer Studio

Hi

  I am using DSP5509S study board. In that board, i wrote code for mcbsp transmit for different channel is successfully. When am McBsp receive, i am unable to read data.(5th channel receive & 9th channel as transmit)when i am write any 8-bit data to 9th channel it will be successful. But i try to read data at 5th channel in receive, write to 9th channel in transmit.

In that receive DR pin , i connect with 2.048MHZ clock signal.

any other suggestion to read :

i attach my source code here, 

 

#include <csl.h>
#include <csl_pll.h>
#include <csl_gpio5509a.h>
#include <csl_mcbsp.h>
#include <csl_irq.h>
#include <csl_timer.h>

TIMER_Handle mhTimer0;
MCBSP_Handle hMcbsp;

ioport unsigned int *PCR_1=(unsigned int *)0x2c12;
#define REG_PCR1 (*PCR_1)
ioport unsigned int *PCR_2=(unsigned int *)0x3012;
#define REG_PCR2 (*PCR_2)

ioport unsigned int *EBSR=(unsigned int *)0x6c00;
#define REG_EBSR (*EBSR)

void settimer();
extern void VECSTART(void);
interrupt void timer0Isr(void);

Uint16 eventId0,status=0,x,receive[32],value;
Uint16 i,temp,dain,daout,aic23data,inc=1;

PLL_Config  myConfig      = {
  0,
  1,
  12,
  1
};

#define TIMER_CTRL    TIMER_TCR_RMK(\
                      TIMER_TCR_IDLEEN_DEFAULT,    /* IDLEEN == 0 */ \
                      TIMER_TCR_FUNC_OF(0),        /* FUNC   == 0 */ \
                      TIMER_TCR_TLB_RESET,         /* TLB    == 1 */ \
                      TIMER_TCR_SOFT_BRKPTNOW,     /* SOFT   == 0 */ \
                      TIMER_TCR_FREE_WITHSOFT,     /* FREE   == 0 */ \
                      TIMER_TCR_PWID_OF(0),        /* PWID   == 0 */ \
                      TIMER_TCR_ARB_RESET,         /* ARB    == 1 */ \
                      TIMER_TCR_TSS_START,         /* TSS    == 0 */ \
                      TIMER_TCR_CP_PULSE,          /* CP     == 0 */ \
                      TIMER_TCR_POLAR_LOW,         /* POLAR  == 0 */ \
                      TIMER_TCR_DATOUT_0           /* DATOUT == 0 */ \
)

TIMER_Config timCfg0 = {
   TIMER_CTRL,               /* TCR0 */
   72,                  	/* PRD0 */
   0                    	/* PRSC */
};

MCBSP_Config Mcbsp1Config = {
  MCBSP_SPCR1_RMK(
    MCBSP_SPCR1_DLB_OFF,                   /* DLB    = 0,½ûÖ¹×Ô±Õ»··½Ê½ */
    MCBSP_SPCR1_RJUST_LZF,                 /* RJUST  = 2 */
    MCBSP_SPCR1_CLKSTP_DISABLE,            /* CLKSTP = 0 */
    MCBSP_SPCR1_DXENA_ON,                  /* DXENA  = 1 */
    0,                                     /* ABIS   = 0 */
	MCBSP_SPCR1_RINTM_RRDY,                /* RINTM  = 0 */
    0,                                     /* RSYNCER = 0 */
    MCBSP_SPCR1_RRST_DISABLE               /* RRST   = 0 */
   ),
    MCBSP_SPCR2_RMK(
    MCBSP_SPCR2_FREE_NO,                   /* FREE   = 0 */
    MCBSP_SPCR2_SOFT_NO,                   /* SOFT   = 0 */
    MCBSP_SPCR2_FRST_FSG,                  /* FRST   = 0 */
    MCBSP_SPCR2_GRST_CLKG,                 /* GRST   = 0 */
	MCBSP_SPCR2_XINTM_XRDY,                /* XINTM  = 0 */
    0,                                     /* XSYNCER = N/A */
    MCBSP_SPCR2_XRST_DISABLE               /* XRST   = 0 */
   ),
  MCBSP_RCR1_RMK(
  	MCBSP_RCR1_RFRLEN1_OF(31),              /* RFRLEN1 = 1 */
  	MCBSP_RCR1_RWDLEN1_8BIT               /* RWDLEN1 = 2 */
  ),
  MCBSP_RCR2_RMK(
    MCBSP_RCR2_RPHASE_SINGLE,              /* RPHASE  = 0 */
    MCBSP_RCR2_RFRLEN2_OF(0),              /* RFRLEN2 = 0 */
    MCBSP_RCR2_RWDLEN2_8BIT,               /* RWDLEN2 = 0 */
    MCBSP_RCR2_RCOMPAND_MSB,               /* RCOMPAND = 0 */
    MCBSP_RCR2_RFIG_YES,                   /* RFIG    = 0 */
	MCBSP_RCR2_RDATDLY_1BIT                /* RDATDLY = 1 */
    ),
   MCBSP_XCR1_RMK(
    MCBSP_XCR1_XFRLEN1_OF(31),              /* XFRLEN1 = 1 */
    MCBSP_XCR1_XWDLEN1_8BIT               /* XWDLEN1 = 2 */
 ),
 MCBSP_XCR2_RMK(
    MCBSP_XCR2_XPHASE_SINGLE,              /* XPHASE  = 0 */
    MCBSP_XCR2_XFRLEN2_OF(0),              /* XFRLEN2 = 0 */
    MCBSP_XCR2_XWDLEN2_8BIT,               /* XWDLEN2 = 0 */
    MCBSP_XCR2_XCOMPAND_MSB,               /* XCOMPAND = 0 */
    MCBSP_XCR2_XFIG_YES,                   /* XFIG    = 0 */
    MCBSP_XCR2_XDATDLY_1BIT                /* XDATDLY = 1 */
  ),
 MCBSP_SRGR1_DEFAULT,
 MCBSP_SRGR2_DEFAULT,
 0x0002,//MCBSP_MCR1_DEFAULT,
 0x0002,//MCBSP_MCR2_DEFAULT,
 MCBSP_PCR_RMK(
   MCBSP_PCR_IDLEEN_RESET,                 /* IDLEEN   = 0   */
   MCBSP_PCR_XIOEN_GPIO,                   /* XIOEN    = 1   */
   MCBSP_PCR_RIOEN_GPIO,                   /* RIOEN    = 1   */
   MCBSP_PCR_FSXM_EXTERNAL,                /* FSXM     = 0   */
   MCBSP_PCR_FSRM_EXTERNAL,                /* FSRM     = 0   */
   MCBSP_PCR_CLKXM_INPUT,                  /* CLKXM    = 0   */
   MCBSP_PCR_CLKRM_INPUT,                  /* CLKRM    = 0   */
   MCBSP_PCR_SCLKME_NO,                    /* SCLKME   = 0   */
   MCBSP_PCR_DXSTAT_1,                     /* DXSTAT   = 1   */
   MCBSP_PCR_FSXP_ACTIVEHIGH,              /* FSXP     = 0   */
   MCBSP_PCR_FSRP_ACTIVEHIGH,              /* FSRP     = 1   */
   MCBSP_PCR_CLKXP_FALLING,                /* CLKXP    = 1   */
   MCBSP_PCR_CLKRP_RISING                  /* CLKRP    = 1   */
 ),
 0x0010,
 MCBSP_RCERB_DEFAULT,
 MCBSP_RCERC_DEFAULT,
 MCBSP_RCERD_DEFAULT,
 MCBSP_RCERE_DEFAULT,
 MCBSP_RCERF_DEFAULT,
 MCBSP_RCERG_DEFAULT,
 MCBSP_RCERH_DEFAULT,
 0x0100,
 0x0000,
 MCBSP_XCERC_DEFAULT,
 MCBSP_XCERD_DEFAULT,
 MCBSP_XCERE_DEFAULT,
 MCBSP_XCERF_DEFAULT,
 MCBSP_XCERG_DEFAULT,
 MCBSP_XCERH_DEFAULT
};

void settimer()
{
	IRQ_setVecs((Uint32)(&VECSTART));
	IRQ_globalDisable();
	mhTimer0 = TIMER_open(TIMER_DEV0, TIMER_OPEN_RESET);
	eventId0 = TIMER_getEventId(mhTimer0);
	IRQ_clear(eventId0);
	IRQ_plug(eventId0,&timer0Isr);
	TIMER_config(mhTimer0, &timCfg0);
	IRQ_enable(eventId0);
	IRQ_globalEnable();
	TIMER_start(mhTimer0);

	for(i=0;i<1000;i++);
}
interrupt void timer0Isr(void)
{
	if(status == 0)
	{
	   _IODATA= _IODATA & 0x00;
	    status=1;
	}
	else if(status == 1)
	{
		_IODATA= _IODATA | 0xFF;
		 status=0;
	}
}
void main(void)
{
    CSL_init();

    PLL_config(&myConfig);
    REG_EBSR=0x0000;
    _IODIR = 0xFF;
    settimer();
	hMcbsp = MCBSP_open(MCBSP_PORT2,MCBSP_OPEN_RESET);
	MCBSP_config(hMcbsp,&Mcbsp1Config);
	MCBSP_start(hMcbsp,MCBSP_XMIT_START | MCBSP_RCV_START,0);
	while(1)
	{
			while(!MCBSP_rrdy(hMcbsp));
			value=MCBSP_read(hMcbsp);
			while(!MCBSP_xrdy(hMcbsp));
			MCBSP_write(hMcbsp,value);

	}
}

Thanks

  • Hi Muneeswaran,

    Is the issue appears when receive on 5th channel and transmit to 9th channel or it can be reproduces with each other channel?
    Did you check result of CSL_McBSP_Interrupt_Example execution? If it is working on your board I suggest you to use this example for starting point and add your functionality there.

    Regards,
    Tsvetolin Shulev
  • Hi sir,

    i check that CSL_McBSP_Interrupt_Example. When am execute the example, i got TEST FAIL.

    any help to solve this problem.

    Thanks

  • HI,
    now test passed,when i modify
    for (i = 0; i <= N - 1; i++) {
    xmt[i] = 0x55;
    rcv[i] = 0;

    In previous , xmt[i] as ((Uint32)i << 17) + i;

    how this problem occured??
    any help
  • Hi,
    When DLB =1, that program detects receive interrupt.
    When DLB=0, receive interrupt doesnot occur.
    anyother setting i need change?
    please share that information receive interrupt with DLB=0. Anyother example for Mcbsp in DSP5509 Development board?
    (transmit data to particular channel is success, but i stuck with receive side. help me to out. )
    Thanks
  • when DLB=0, i will connect DX pin to DR pin of Mcbsp.
    Is it correct? any other method to provide to read data??
  • Hi Mr.Tsvetolin Shulev,

    Its working fine. I didn't notice other parameter. Now i write to read and write data in multichannel it working fine.

    #include <stdio.h>
    #include <csl.h>
    #include <csl_mcbsp.h>
    #include <csl_irq.h>
    
    #define N 10
    MCBSP_Handle mhMcbsp;
    
    Uint16 xmt[N], rcv[N],K=1;
    volatile Uint16 XfrCnt = 0;
    Uint16 err = 0;
    Uint16 old_intm;
    Uint16 rcvEventId, xmtEventId;
    
    MCBSP_Config ConfigLoopBack32 =
    {
      MCBSP_SPCR1_RMK(
        MCBSP_SPCR1_DLB_OFF,                   /* DLB    = 0,Prohibition of self closing rings*/
        MCBSP_SPCR1_RJUST_RZF,                 /* RJUST  = 2 */
        MCBSP_SPCR1_CLKSTP_DISABLE,            /* CLKSTP = 0 */
        MCBSP_SPCR1_DXENA_NA,                  /* DXENA  = 1 */
        0,                                     /* ABIS   = 0 */
        MCBSP_SPCR1_RINTM_RRDY,                /* RINTM  = 0 */
        0,                                     /* RSYNCER = 0 */
        MCBSP_SPCR1_RRST_DISABLE               /* RRST   = 0 */
       ),
        MCBSP_SPCR2_RMK(
        MCBSP_SPCR2_FREE_NO,                   /* FREE   = 0 */
        MCBSP_SPCR2_SOFT_NO,                   /* SOFT   = 0 */
        MCBSP_SPCR2_FRST_RESET,                  /* FRST   = 0 */
        MCBSP_SPCR2_GRST_RESET,                 /* GRST   = 0 */
        MCBSP_SPCR2_XINTM_XRDY,                /* XINTM  = 0 */
        0,                                     /* XSYNCER = N/A */
        MCBSP_SPCR2_XRST_DISABLE               /* XRST   = 0 */
       ),
      MCBSP_RCR1_RMK(
          MCBSP_RCR1_RFRLEN1_OF(31),              /* RFRLEN1 = 1 */
          MCBSP_RCR1_RWDLEN1_8BIT               /* RWDLEN1 = 2 */
      ),
      MCBSP_RCR2_RMK(
        MCBSP_RCR2_RPHASE_SINGLE,              /* RPHASE  = 0 */
        MCBSP_RCR2_RFRLEN2_OF(0),              /* RFRLEN2 = 0 */
        MCBSP_RCR2_RWDLEN2_8BIT,               /* RWDLEN2 = 0 */
        MCBSP_RCR2_RCOMPAND_MSB,               /* RCOMPAND = 0 */
        MCBSP_RCR2_RFIG_YES,                   /* RFIG    = 0 */
        MCBSP_RCR2_RDATDLY_2BIT                /* RDATDLY = 1 */
        ),
       MCBSP_XCR1_RMK(
        MCBSP_XCR1_XFRLEN1_OF(31),              /* XFRLEN1 = 1 */
        MCBSP_XCR1_XWDLEN1_8BIT               /* XWDLEN1 = 2 */
    
     ),
     MCBSP_XCR2_RMK(
        MCBSP_XCR2_XPHASE_SINGLE,              /* XPHASE  = 0 */
        MCBSP_XCR2_XFRLEN2_OF(0),              /* XFRLEN2 = 0 */
        MCBSP_XCR2_XWDLEN2_8BIT,               /* XWDLEN2 = 0 */
        MCBSP_XCR2_XCOMPAND_MSB,               /* XCOMPAND = 0 */
        MCBSP_XCR2_XFIG_YES,                   /* XFIG    = 0 */
        MCBSP_XCR2_XDATDLY_2BIT                /* XDATDLY = 1 */
      ),
     MCBSP_SRGR1_DEFAULT,
     MCBSP_SRGR2_DEFAULT,
     0x0001,//MCBSP_MCR1_DEFAULT,
     0x0001,//MCBSP_MCR2_DEFAULT,
     MCBSP_PCR_RMK(
       MCBSP_PCR_IDLEEN_RESET,                 /* IDLEEN   = 0   */
       MCBSP_PCR_XIOEN_SP,                     /* XIOEN    = 0   */
       MCBSP_PCR_RIOEN_SP,                     /* RIOEN    = 0   */
       MCBSP_PCR_FSXM_EXTERNAL,                /* FSXM     = 0   */
       MCBSP_PCR_FSRM_EXTERNAL,                /* FSRM     = 0   */
       0,                                      /* DXSTAT = N/A   */
       MCBSP_PCR_CLKXM_INPUT,                  /* CLKXM    = 0   */
       MCBSP_PCR_CLKRM_OUTPUT,                  /* CLKRM    = 0   */
       MCBSP_PCR_SCLKME_NO,                    /* SCLKME   = 0   */
       MCBSP_PCR_FSXP_ACTIVEHIGH,              /* FSXP     = 0   */
       MCBSP_PCR_FSRP_ACTIVEHIGH,              /* FSRP     = 1   */
       MCBSP_PCR_CLKXP_RISING,                /* CLKXP    = 1   */
       MCBSP_PCR_CLKRP_FALLING                  /* CLKRP    = 1   */
     ),
     0x4000,
     MCBSP_RCERB_DEFAULT,
     MCBSP_RCERC_DEFAULT,
     MCBSP_RCERD_DEFAULT,
     MCBSP_RCERE_DEFAULT,
     MCBSP_RCERF_DEFAULT,
     MCBSP_RCERG_DEFAULT,
     MCBSP_RCERH_DEFAULT,
     0x4000,
     MCBSP_XCERB_DEFAULT,
     MCBSP_XCERC_DEFAULT,
     MCBSP_XCERD_DEFAULT,
     MCBSP_XCERE_DEFAULT,
     MCBSP_XCERF_DEFAULT,
     MCBSP_XCERG_DEFAULT,
     MCBSP_XCERH_DEFAULT
    };
    extern void VECSTART(void);
    interrupt void writeIsr(void);
    interrupt void readIsr(void);
    
    
    void main(void)
    {
    	Uint16 i;
    	CSL_init();
    	IRQ_setVecs((Uint32)(&VECSTART));
    	for (i = 0; i <= N - 1; i++)
    	{
    		xmt[i] = 0x55;
    		rcv[i] = 0;
    	}
    	old_intm = IRQ_globalDisable();
    	mhMcbsp = MCBSP_open(MCBSP_PORT2, MCBSP_OPEN_RESET);
    	rcvEventId = MCBSP_getRcvEventId(mhMcbsp);
    	xmtEventId = MCBSP_getXmtEventId(mhMcbsp);
    	IRQ_clear(rcvEventId);
    	IRQ_clear(xmtEventId);
    	IRQ_plug(rcvEventId, &readIsr);
    	IRQ_plug(xmtEventId, &writeIsr);
    	MCBSP_config(mhMcbsp, &ConfigLoopBack32);
    	IRQ_enable(xmtEventId);IRQ_enable(rcvEventId);
    	MCBSP_start(mhMcbsp,MCBSP_RCV_START | MCBSP_XMIT_START,0);
    	IRQ_globalEnable();
    	//while(1)
    	//{
    		while(!MCBSP_xrdy(mhMcbsp));
    		//MCBSP_write(mhMcbsp,0x55);
    		//IRQ_enable(rcvEventId);
    		while (XfrCnt < 10);
    		for(i = 0; i < N - 1; i++)
    		{
    			if (rcv[i] != xmt[i])
    			{
    				++err;
    				break;
    		   }
    		}
    		printf ("%s\n",err?"TEST FAILED" : "TEST PASSED");
    		IRQ_globalRestore(old_intm);
    		MCBSP_close(mhMcbsp);
    	//}
    }
    
    interrupt void writeIsr(void)
    {
        IRQ_disable(xmtEventId);
        MCBSP_write(mhMcbsp,xmt[XfrCnt]);
    }
    
    interrupt void readIsr(void)
    {
        rcv[XfrCnt] = MCBSP_read(mhMcbsp);
        ++XfrCnt;
        if (XfrCnt == N)
        {
            IRQ_disable(rcvEventId);
            IRQ_disable(xmtEventId);
            MCBSP_reset(mhMcbsp);
        }
        else
        {
            IRQ_enable(xmtEventId);
        }
    }
    

    Thanks for your support, help me to out the problem