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Linux/AM3352: GPMC_AD15 toggles after reset

Sung-IL
Mastermind 31540 points

Part Number: AM3352

Tool/software: Linux

Dear Champs,

My customer set GPMC-AD15(U13) pin as GPIO and connected it to WP_EEPROM.

They found divergence signal in U13 pin after 10ms of reset as below, and requested how it can be removed.

They confirmed U13 pin was set as GPIO in the mux.c file of SPL, and they are suspecting it is GPMC addressing in RBL although their bootmode is SPI0 bootmode.

Could you please let me know if GPMC addressing was occurred in RBL even when SPI bootmode was used?

Is there any method to remove this GPMC addressing in the RBL?

Their SW is Linux SDK v4.0.

Thanks and Best Regards,

SI.

  • 0
    TI__Guru**** 393215 points
    Hi,

    This is the ROM code trying to access GPMC. Please post the exact SYSBOOT values so that we can narrow down the issue further.
  • 0 in reply to Biser Gatchev-XID
    TI__Mastermind 31540 points

    Hi Biser,

    I made a mistake and their boot mode was NAND boot mode as below.

    But, they are using 8-bit NAND and using other pins as GPIO as you see their schematic I shared.

    When I checked SYSBOOT pin, it seems there is no way to inform 8bit NAND to RBL.

    Is there any method to inform 8bit NAND to RBL and remove this undesirable divergence in the U13(GPMC_AD15) pin even at NAND boot mode?

    Their BOOTMODE is as below.

    SYSBOOT[4:0]     : 10011 => NAND/NANDI2C/MMC0/UART0

    SYSBOOT[5]        : 0         => 0 = CLKOUT1 disabled

    SYSBOOT[7:6]     : 00       => Don't care for ROM code

    SYSBOOT[8]        : 0         => Don't care for ROM code

    SYSBOOT[9]        : 0         => ECC done by ROM

    SYSBOOT[11:10] : 00       => 00(for NAND boot)

    SYSBOOT[13:12] : 00       => all other values reserved

    SYSBOOT[15:14] : 01       => 01b = 24Mhz

    Sorry for confusing you by my mistake.

    Thanks and Best Regards,

    SI.

  • 0 in reply to Sung-IL
    TI__Guru**** 393215 points
    Section 26.1.8.4.2 of the AM335x TRM Rev. P states:

    "GPMC Initialization

    The GPMC interface is configured as such it can be used for accessing NAND devices. The address bus is released since a NAND device does not use it. The data bus width is initially set to 16 bits; and changed to 8 bits if needed after device parameters determination."