Part Number: TMS320C6654
Tool/software: TI-RTOS
I am using Processor RTOS SDK for C665X. I am building a project for C6654 based on examples from TMDSEVM6657LS.
From the documentation, I copied the /ti/pdk_c665x_2_0_12/packages/ti/board/src/evmC6657 folder and renamed it and now I am editing it.
In the file evmC6657.c in the root folder mentioned above :
/* external input clock to PA/ARM/DDR3 PLLs */
const uint32_t Board_ext_clk[CSL_PLL_MAX] =
{
EXT_CLK_100M, /* sys clock */
0, /* no PA clock */
0, /* no ARM clock */
EXT_CLK_50M /* DDR3 clock */
};
Shouldn't DDR3 clock be EXT_CLK_66M67 ? I have the EVM and the schematic shows 66.67 feeding the DDR clock pins.
On my custom board the clock input for DDRCLK will be the same as the EVM 66.67MHz.
- Is this a mistake ? Should it be as I suggested or I am missing something ?
- If yes, what is the purpose of Board_ext_clk, clearly the DDR is working on the EVM
I am using processor_sdk_rtos_c665x_5_02_00_10 on Ubuntu
Update:
Checking the PLL settings in const pllcConfig pllcConfigs[]:
const pllcConfig pllcConfigs[] = {
{CSL_PLL_SYS, 20, 1, 2}, /* 1000 MHz */
{CSL_PLL_DDR3, 80, 3, 2}, /* 666.66 MHz*/
};
It makes sense if DDR3 Clock is 50MHz not 66.67,
50/3 = 16.6666666
16.6666*80 = 1333.33333
1333.3333/2 = 666.66
What am I missing ?
