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Linux/AM3352: GPIO read error

Part Number: AM3352
Other Parts Discussed in Thread: TPS65217

Tool/software: Linux

Hi all,

1,Now my dts as below:

nandflash_pins_default: nandflash_pins_default {
pinctrl-single,pins = <
0x0 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */
0x4 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */
0x8 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */
0xc (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */
0x10 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */
0x14 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */
0x18 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */
0x1c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */
0x70 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */
0x74 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpio0_30 */
0x7c (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */
0x90 (PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */
0x94 (PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */
0x98 (PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */
0x9c (PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */
>;
};

gpio0_pins_default: gpio0_pins_default {
pinctrl-single,pins = <
AM33XX_IOPAD(0x20, PIN_OUTPUT | MUX_MODE7) /* (U10) gpmc_ad8.gpio0[22] */
AM33XX_IOPAD(0x24, PIN_OUTPUT | MUX_MODE7) /* (T10) gpmc_ad9.gpio0[23] */
AM33XX_IOPAD(0x28, PIN_INPUT | MUX_MODE7) /* (T11) gpmc_ad10.gpio0[26] */
AM33XX_IOPAD(0x2c, PIN_INPUT | MUX_MODE7) /* (U12) gpmc_ad11.gpio0[27] */
>;
};

gpio1_pins_default: gpio1_pins_default {
pinctrl-single,pins = <
AM33XX_IOPAD(0x30, PIN_INPUT | MUX_MODE7) /* (T12) gpmc_ad12.gpio1[12] */
AM33XX_IOPAD(0x34, PIN_INPUT | MUX_MODE7) /* (R12) gpmc_ad13.gpio1[13] */
AM33XX_IOPAD(0x38, PIN_INPUT | MUX_MODE7) /* (V13) gpmc_ad14.gpio1[14] */
AM33XX_IOPAD(0x3c, PIN_INPUT | MUX_MODE7) /* (U13) gpmc_ad15.gpio1[15] */
AM33XX_IOPAD(0x80, PIN_OUTPUT | MUX_MODE7) /* (U9) gpmc_csn1.gpio1[30] */
AM33XX_IOPAD(0x84, PIN_OUTPUT | MUX_MODE7) /* (V9) gpmc_csn2.gpio1[31] */
>;
};

2,my nand is 8bit-data bus.

3,notice that I use these pin as input gpio:

(T11) gpmc_ad10.gpio0[26] 

(U12) gpmc_ad11.gpio0[27]

(T12) gpmc_ad12.gpio1[12] 

 (R12) gpmc_ad13.gpio1[13]

(V13) gpmc_ad14.gpio1[14]

(U13) gpmc_ad15.gpio1[15]

4,operations as below:

1,when boot by sd card.I read the gpio value, it is ok.

2,when boot by nand flash,I read the gpio value,it wrong.

3,read actions:

cd /sys/class/gpio

echo 26 > export

cd gpio26

echo "in" > direction

cat value

4,the nand flash is made by the sdcard,

What is the problem?

Best regards

  • Additional information:
    1,The GPIO input 3.3V。
    when boot by SD,read it, value is 1.
    when boot by flash,read it,value is 0,error.
  • Additional information:
    my linux version :TI SDK linux-4.14.79+gitAUTOINC+bde58ab01e-gbde58ab01e
  • Hi user4823139,

    Do you use AM335x TI board (EVM, SK, ICE, BBB) or custom board?

    Do you use linux kernel v4.14.79 that comes with AM335x TI PSDK Linux v05.03 ?

    Regards,
    Pavel
  • Hi all,

    1,I use a custom board.

    2,yes,I use linux kernel v4.14.79 that comes with AM335x TI PSDK Linux v05.03 .

    3,I build my sdcard.img with buildroot tool,my special  uboot :

    VERSION = 2016
    PATCHLEVEL = 05

    4,I check the pinmux register. the pinmux register of the gpio is wrong,the gpio is configed as nand.

    I need modify uboot? or kernel? where?

    Best regards

  • Hi all,

    My problem is the same as below:
    e2e.ti.com/.../2977353

    Now I change the uboot mux.c file,but no effect.
  • user4823139,

    I assume your custom board is based on AM335x EVM board.

    GPIO pins are configured in below files:

    u-boot-2018.01/board/ti/am335x/mux.c
    u-boot-2018.01/arch/arm/dts/am335x-evm.dts

    linux-4.14.79/arch/arm/boot/dts/am335x-evm.dts

    Regards,
    Pavel
  • Hi all,

    Attach is my dts file.

    Because I need my GPIOS just work as data in,or data out.

    If according to Pavel's advice,the sysfs commands such as "echo 26 > export " can't work.

    Please help me to check my dts file.

    Best regards.

    /*
    * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
    *
    * This program is free software; you can redistribute it and/or modify
    * it under the terms of the GNU General Public License version 2 as
    * published by the Free Software Foundation.
    */
    /dts-v1/;

    #include "am33xx.dtsi"
    #include <dt-bindings/interrupt-controller/irq.h>

    / {
    model = "MYIR MYD J335x";
    compatible = "ti,myd_j335x", "ti,am33xx";

    cpus {
    cpu@0 {
    cpu0-supply = <&dcdc2_reg>;
    };
    };

    memory {
    device_type = "memory";
    reg = <0x80000000 0x10000000>; /* 512 MB */
    };

    vbat: fixedregulator@0 {
    compatible = "regulator-fixed";
    regulator-name = "vbat";
    regulator-min-microvolt = <5000000>;
    regulator-max-microvolt = <5000000>;
    regulator-boot-on;
    regulator-always-on;
    };

    vdd_3v3b: fixedregulator@1 {
    compatible = "regulator-fixed";
    regulator-name = "vdd_3v3b";
    regulator-min-microvolt = <3300000>;
    regulator-max-microvolt = <3300000>;
    vin-supply = <&vbat>;
    regulator-boot-on;
    regulator-always-on;
    };

    clk11m: clk11m {
    #clock-cells = <0>;
    compatible = "fixed-clock";
    clock-frequency = <11059200>;
    };

    watchdog: watchdog {
    /* CAT823T */
    compatible = "linux,wdt-gpio";
    pinctrl-names = "default";
    pinctrl-0 = <&watchdog_pins>;
    gpios = <&gpio3 8 GPIO_ACTIVE_LOW>;
    hw_algo = "toggle";
    always-running;
    hw_margin_ms = <1000>;
    };
    };

    &am33xx_pinmux {

    watchdog_pins: pinmux_watchdog_pins{
    pinctrl-single,pins = <0x1E8 (PIN_OUTPUT_PULLDOWN | MUX_MODE7)>;
    };

    i2c0_pins: pinmux_i2c0_pins {
    pinctrl-single,pins = <
    0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
    0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
    >;
    };

    uart0_pins: pinmux_uart0_pins {
    pinctrl-single,pins = <
    0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
    0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
    >;
    };

    uart1_pins_default: pinmux_uart1_pins_default {
    pinctrl-single,pins = <
    0x180 ( PIN_INPUT_PULLUP | MUX_MODE0 ) /* (D16) uart1_rxd.uart1_rxd */
    0x184 ( PIN_OUTPUT_PULLDOWN | MUX_MODE0 ) /* (D15) uart1_txd.uart1_txd */
    >;
    };

    uart1_pins_sleep: pinmux_uart1_pins_sleep {
    pinctrl-single,pins = <
    0x180 (PIN_INPUT_PULLDOWN | MUX_MODE7)
    0x184 (PIN_INPUT_PULLDOWN | MUX_MODE7)
    >;
    };

    uart2_pins_default: pinmux_uart2_pins_default {
    pinctrl-single,pins = <
    0x10c ( PIN_INPUT_PULLUP | MUX_MODE6 ) /* (H17) gmii1_crs.uart2_rxd */
    0x110 ( PIN_OUTPUT_PULLDOWN | MUX_MODE6 ) /* (J15) gmii1_rxer.uart2_txd */
    >;
    };

    uart2_pins_sleep: pinmux_uart2_pins_sleep {
    pinctrl-single,pins = <
    0x10C (PIN_INPUT_PULLDOWN | MUX_MODE7)
    0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7)
    >;
    };

    uart3_pins_default: pinmux_uart3_pins_default {
    pinctrl-single,pins = <
    0x160 ( PIN_INPUT_PULLUP | MUX_MODE1 ) /* (C15) spi0_cs1.uart3_rxd */
    0x164 ( PIN_OUTPUT_PULLDOWN | MUX_MODE1 ) /* (C18) eCAP0_in_PWM0_out.uart3_txd */
    >;
    };

    uart3_pins_sleep: pinmux_uart3_pins_sleep {
    pinctrl-single,pins = <
    0x160 ( PIN_INPUT_PULLDOWN | MUX_MODE1 ) /* (C15) spi0_cs1.uart3_rxd */
    0x164 ( PIN_INPUT_PULLDOWN | MUX_MODE1 ) /* (C18) eCAP0_in_PWM0_out.uart3_txd */
    >;
    };

    uart4_pins_default: pinmux_uart4_pins_default {
    pinctrl-single,pins = <
    0x168 ( PIN_INPUT_PULLUP | MUX_MODE1 ) /* (E18) uart0_ctsn.uart4_rxd */
    0x16c ( PIN_OUTPUT_PULLDOWN | MUX_MODE1 ) /* (E17) uart0_rtsn.uart4_txd */
    >;
    };

    uart4_pins_sleep: pinmux_uart4_pins_sleep {
    pinctrl-single,pins = <
    0x168 ( PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (E18) uart0_ctsn.uart4_rxd */
    0x16c ( PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (E17) uart0_rtsn.uart4_txd */
    >;
    };

    uart5_pins_default: pinmux_uart5_pins_default {
    pinctrl-single,pins = <
    0x108 ( PIN_INPUT_PULLUP | MUX_MODE3 ) /* (H16) gmii1_col.uart5_rxd */
    0x144 ( PIN_OUTPUT_PULLDOWN | MUX_MODE3 ) /* (H18) rmii1_refclk.uart5_txd */
    >;
    };

    uart5_pins_sleep: pinmux_uart5_pins_sleep {
    pinctrl-single,pins = <
    0x108 ( PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (H16) gmii1_col.uart5_rxd */
    0x144 ( PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (H18) rmii1_refclk.uart5_txd */
    >;
    };

    nandflash_pins_default: nandflash_pins_default {
    pinctrl-single,pins = <
    0x0 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */
    0x4 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */
    0x8 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */
    0xc (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */
    0x10 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */
    0x14 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */
    0x18 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */
    0x1c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */
    0x70 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */
    0x74 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpio0_30 */
    0x7c (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */
    0x90 (PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */
    0x94 (PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */
    0x98 (PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */
    0x9c (PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */
    >;
    };

    nandflash_pins_sleep: nandflash_pins_sleep {
    pinctrl-single,pins = <
    0x0 (PIN_INPUT_PULLDOWN | MUX_MODE7)
    0x4 (PIN_INPUT_PULLDOWN | MUX_MODE7)
    0x8 (PIN_INPUT_PULLDOWN | MUX_MODE7)
    0xc (PIN_INPUT_PULLDOWN | MUX_MODE7)
    0x10 (PIN_INPUT_PULLDOWN | MUX_MODE7)
    0x14 (PIN_INPUT_PULLDOWN | MUX_MODE7)
    0x18 (PIN_INPUT_PULLDOWN | MUX_MODE7)
    0x1c (PIN_INPUT_PULLDOWN | MUX_MODE7)
    0x70 (PIN_INPUT_PULLDOWN | MUX_MODE7)
    0x74 (PIN_INPUT_PULLDOWN | MUX_MODE7)
    0x7c (PIN_INPUT_PULLDOWN | MUX_MODE7)
    0x90 (PIN_INPUT_PULLDOWN | MUX_MODE7)
    0x94 (PIN_INPUT_PULLDOWN | MUX_MODE7)
    0x98 (PIN_INPUT_PULLDOWN | MUX_MODE7)
    0x9c (PIN_INPUT_PULLDOWN | MUX_MODE7)
    >;
    };

    cpsw_default: cpsw_default {
    pinctrl-single,pins = <
    /* Slave 1 */
    0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */
    0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */
    0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd3.rgmii1_td3 */
    0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd2.rgmii1_td2 */
    0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */
    0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */
    0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */
    0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rgmii1_rclk */
    0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */
    0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd2.rgmii1_rd2 */
    0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */
    0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */
    /* Slave 2 */
    0x40 (MUX_MODE2 | PIN_OUTPUT_PULLDOWN) /* gpmc_a0.rgmii2_tctl */
    0x44 (MUX_MODE2 | PIN_INPUT_PULLDOWN) /* gpmc_a1.rgmii2_rctl */
    0x48 (MUX_MODE2 | PIN_OUTPUT_PULLDOWN) /* gpmc_a2.rgmii2_td3 */
    0x4c (MUX_MODE2 | PIN_OUTPUT_PULLDOWN) /* gpmc_a3.rgmii2_td2 */
    0x50 (MUX_MODE2 | PIN_OUTPUT_PULLDOWN) /* gpmc_a4.rgmii2_td1 */
    0x54 (MUX_MODE2 | PIN_OUTPUT_PULLDOWN) /* gpmc_a5.rgmii2_td0 */
    0x58 (MUX_MODE2 | PIN_OUTPUT_PULLDOWN) /* gpmc_a6.rgmii2_tclk */
    0x5c (MUX_MODE2 | PIN_INPUT_PULLDOWN) /* gpmc_a7.rgmii2_rclk */
    0x60 (MUX_MODE2 | PIN_INPUT_PULLDOWN) /* gpmc_a8.rgmii2_rd3 */
    0x64 (MUX_MODE2 | PIN_INPUT_PULLDOWN) /* gpmc_a9.rgmii2_rd2 */
    0x68 (MUX_MODE2 | PIN_INPUT_PULLDOWN) /* gpmc_a10.rgmii2_rd1 */
    0x6c (MUX_MODE2 | PIN_INPUT_PULLDOWN) /* gpmc_a11.rgmii2_rd0 */

    >;
    };

    cpsw_sleep: cpsw_sleep {
    pinctrl-single,pins = <
    /* Slave 1 reset value */
    0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
    0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
    0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
    0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
    0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
    0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
    0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
    0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
    0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
    0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
    0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
    0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
    /* Slave 2 reset value */
    0x40 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a0.rgmii2_tctl */
    0x44 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a1.rgmii2_rctl */
    0x48 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a2.rgmii2_td3 */
    0x4c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a3.rgmii2_td2 */
    0x50 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a4.rgmii2_td1 */
    0x54 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.rgmii2_td0 */
    0x58 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a6.rgmii2_tclk */
    0x5c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a7.rgmii2_rclk */
    0x60 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a8.rgmii2_rd3 */
    0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a9.rgmii2_rd2 */
    0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a10.rgmii2_rd1 */
    0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a11.rgmii2_rd0 */
    >;
    };

    davinci_mdio_default: davinci_mdio_default {
    pinctrl-single,pins = <
    /* MDIO */
    0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
    0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
    >;
    };

    davinci_mdio_sleep: davinci_mdio_sleep {
    pinctrl-single,pins = <
    /* MDIO reset value */
    0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
    0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
    >;
    };

    mmc1_pins_default: pinmux_mmc1_pins {
    pinctrl-single,pins = <
    0x0F0 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
    0x0F4 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
    0x0F8 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
    0x0FC (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
    0x100 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_clk.mmc0_clk */
    0x104 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
    0x1A4 (PIN_INPUT_PULLUP | MUX_MODE7) /* mcasp0_fsr.gpio3_19 */
    >;
    };

    mmc1_pins_sleep: pinmux_mmc1_pins_sleep {
    pinctrl-single,pins = <
    0x0F0 (PIN_INPUT_PULLDOWN | MUX_MODE7)
    0x0F4 (PIN_INPUT_PULLDOWN | MUX_MODE7)
    0x0F8 (PIN_INPUT_PULLDOWN | MUX_MODE7)
    0x0FC (PIN_INPUT_PULLDOWN | MUX_MODE7)
    0x100 (PIN_INPUT_PULLDOWN | MUX_MODE7)
    0x104 (PIN_INPUT_PULLDOWN | MUX_MODE7)
    0x1A4 (PIN_INPUT_PULLDOWN | MUX_MODE7)
    >;
    };

    dcan0_pins_default: dcan0_pins_default {
    pinctrl-single,pins = <
    AM33XX_IOPAD(0x17c, PIN_INPUT | MUX_MODE2) /* (D17) uart1_rtsn.dcan0_rx */
    AM33XX_IOPAD(0x178, PIN_OUTPUT | MUX_MODE2) /* (D18) uart1_ctsn.dcan0_tx */
    >;
    };

    gpio0_pins_default: gpio0_pins_default {
    pinctrl-single,pins = <
    AM33XX_IOPAD(0x20, PIN_OUTPUT | MUX_MODE7) /* (U10) gpmc_ad8.gpio0[22] */
    AM33XX_IOPAD(0x24, PIN_OUTPUT | MUX_MODE7) /* (T10) gpmc_ad9.gpio0[23] */
    AM33XX_IOPAD(0x28, PIN_INPUT_PULLUP | PIN_INPUT | MUX_MODE7) /* (T11) gpmc_ad10.gpio0[26] */
    AM33XX_IOPAD(0x2c, PIN_INPUT_PULLUP | PIN_INPUT | MUX_MODE7) /* (U12) gpmc_ad11.gpio0[27] */
    >;
    };

    gpio1_pins_default: gpio1_pins_default {
    pinctrl-single,pins = <
    AM33XX_IOPAD(0x30, PIN_INPUT_PULLUP | PIN_INPUT | MUX_MODE7) /* (T12) gpmc_ad12.gpio1[12] */
    AM33XX_IOPAD(0x34, PIN_INPUT_PULLUP | PIN_INPUT | MUX_MODE7) /* (R12) gpmc_ad13.gpio1[13] */
    AM33XX_IOPAD(0x38, PIN_INPUT_PULLUP | PIN_INPUT | MUX_MODE7) /* (V13) gpmc_ad14.gpio1[14] */
    AM33XX_IOPAD(0x3c, PIN_INPUT_PULLUP | PIN_INPUT | MUX_MODE7) /* (U13) gpmc_ad15.gpio1[15] */
    AM33XX_IOPAD(0x80, PIN_OUTPUT | MUX_MODE7) /* (U9) gpmc_csn1.gpio1[30] */
    AM33XX_IOPAD(0x84, PIN_OUTPUT | MUX_MODE7) /* (V9) gpmc_csn2.gpio1[31] */
    >;
    };

    gpio2_pins_default: gpio2_pins_default {
    pinctrl-single,pins = <
    AM33XX_IOPAD(0x88, PIN_OUTPUT | MUX_MODE7) /* (T13) gpmc_csn3.gpio2[0] */
    AM33XX_IOPAD(0xe0, PIN_OUTPUT | MUX_MODE7) /* (U5) lcd_vsync.gpio2[22] */
    AM33XX_IOPAD(0xe4, PIN_OUTPUT | MUX_MODE7) /* (R5) lcd_hsync.gpio2[23] */
    AM33XX_IOPAD(0xe8, PIN_OUTPUT | MUX_MODE7) /* (V5) lcd_pclk.gpio2[24] */
    AM33XX_IOPAD(0xec, PIN_OUTPUT | MUX_MODE7) /* (R6) lcd_ac_bias_en.gpio2[25] */
    >;
    };

    gpio3_pins_default: gpio3_pins_default {
    pinctrl-single,pins = <
    AM33XX_IOPAD(0x1a0, PIN_OUTPUT | MUX_MODE7) /* (B12) mcasp0_aclkr.gpio3[18] */
    AM33XX_IOPAD(0x1a8, PIN_OUTPUT | MUX_MODE7) /* (D13) mcasp0_axr1.gpio3[20] */
    AM33XX_IOPAD(0x1ac, PIN_OUTPUT | MUX_MODE7) /* (A14) mcasp0_ahclkx.gpio3[21] */
    >;
    };
    };


    &gpio0 {
    status = "okay";
    pinctrl-names = "default";
    pinctrl-0 = <&gpio0_pins_default>;
    };

    &gpio1 {
    status = "okay";
    pinctrl-names = "default";
    pinctrl-0 = <&gpio1_pins_default>;
    };

    &gpio2 {
    status = "okay";
    pinctrl-names = "default";
    pinctrl-0 = <&gpio2_pins_default>;
    };

    &gpio3 {
    status = "okay";
    pinctrl-names = "default";
    pinctrl-0 = <&gpio3_pins_default>;
    };


    &uart0 {
    pinctrl-names = "default";
    pinctrl-0 = <&uart0_pins>;

    status = "okay";
    };

    &uart1 {
    pinctrl-names = "default", "sleep";
    pinctrl-0 = <&uart1_pins_default>;
    pinctrl-1 = <&uart1_pins_sleep>;
    status = "okay";
    };

    &uart2 {
    pinctrl-names = "default", "sleep";
    pinctrl-0 = <&uart2_pins_default>;
    pinctrl-1 = <&uart2_pins_sleep>;
    status = "okay";
    };

    &uart3 {
    dmas = <&edma_xbar 54 0 7
    &edma_xbar 55 0 8>;
    dma-names = "tx", "rx";

    pinctrl-names = "default", "sleep";
    pinctrl-0 = <&uart3_pins_default>;
    pinctrl-1 = <&uart3_pins_sleep>;
    status = "okay";
    };

    &uart4 {
    dmas = <&edma_xbar 32 0 9
    &edma_xbar 33 0 10>;
    dma-names = "tx", "rx";

    pinctrl-names = "default", "sleep";
    pinctrl-0 = <&uart4_pins_default>;
    pinctrl-1 = <&uart4_pins_sleep>;
    status = "okay";
    };

    &uart5 {
    dmas = <&edma_xbar 34 0 11
    &edma_xbar 35 0 12>;
    dma-names = "tx", "rx";

    pinctrl-names = "default", "sleep";
    pinctrl-0 = <&uart5_pins_default>;
    pinctrl-1 = <&uart5_pins_sleep>;
    status = "okay";
    };

    &i2c0 {
    pinctrl-names = "default";
    pinctrl-0 = <&i2c0_pins>;

    status = "okay";
    clock-frequency = <200000>;

    tps: tps@2d {
    reg = <0x24>;
    };
    };

    &usb {
    status = "okay";
    };

    &usb_ctrl_mod {
    status = "okay";
    };

    &usb0_phy {
    status = "okay";
    };

    &usb1_phy {
    status = "okay";
    };

    &usb0 {
    status = "okay";
    };

    &usb1 {
    status = "okay";
    dr_mode = "host";
    };

    &cppi41dma {
    status = "okay";
    };

    &elm {
    status = "okay";
    };

    &gpmc {
    status = "okay";
    pinctrl-names = "default", "sleep";
    pinctrl-0 = <&nandflash_pins_default>;
    pinctrl-1 = <&nandflash_pins_sleep>;
    ranges = <0 0 0x08000000 0x1000000>; /* CS0: 16MB for NAND */
    nand@0,0 {
    compatible = "ti,omap2-nand";
    reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
    interrupt-parent = <&intc>;
    interrupts = <100>;
    ready-gpio = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
    ti,nand-ecc-opt = "bch8";
    ti,elm-id = <&elm>;
    nand-bus-width = <8>;
    gpmc,device-width = <1>;
    gpmc,sync-clk-ps = <0>;
    gpmc,cs-on-ns = <0>;
    gpmc,cs-rd-off-ns = <44>;
    gpmc,cs-wr-off-ns = <44>;
    gpmc,adv-on-ns = <6>;
    gpmc,adv-rd-off-ns = <34>;
    gpmc,adv-wr-off-ns = <44>;
    gpmc,we-on-ns = <0>;
    gpmc,we-off-ns = <40>;
    gpmc,oe-on-ns = <0>;
    gpmc,oe-off-ns = <54>;
    gpmc,access-ns = <64>;
    gpmc,rd-cycle-ns = <82>;
    gpmc,wr-cycle-ns = <82>;
    gpmc,bus-turnaround-ns = <0>;
    gpmc,cycle2cycle-delay-ns = <0>;
    gpmc,clk-activation-ns = <0>;
    gpmc,wr-access-ns = <40>;
    gpmc,wr-data-mux-bus-ns = <0>;
    /* MTD partition table */
    /* All SPL-* partitions are sized to minimal length
    * which can be independently programmable. For
    * NAND flash this is equal to size of erase-block */
    #address-cells = <1>;
    #size-cells = <1>;
    partition@0 {
    label = "NAND.SPL";
    reg = <0x00000000 0x000020000>;
    };
    partition@1 {
    label = "NAND.SPL.backup1";
    reg = <0x00020000 0x00020000>;
    };
    partition@2 {
    label = "NAND.SPL.backup2";
    reg = <0x00040000 0x00020000>;
    };
    partition@3 {
    label = "NAND.SPL.backup3";
    reg = <0x00060000 0x00020000>;
    };
    partition@4 {
    label = "NAND.u-boot-spl-os";
    reg = <0x00080000 0x00040000>;
    };
    partition@5 {
    label = "NAND.u-boot";
    reg = <0x000C0000 0x00100000>;
    };
    partition@6 {
    label = "NAND.u-boot-env";
    reg = <0x001C0000 0x00020000>;
    };
    partition@7 {
    label = "NAND.u-boot-env.backup1";
    reg = <0x001E0000 0x00020000>;
    };
    partition@8 {
    label = "NAND.kernel";
    reg = <0x00200000 0x00800000>;
    };
    partition@9 {
    label = "NAND.rootfs";
    reg = <0x00A00000 0x0D600000>;
    };
    partition@10 {
    label = "NAND.userdata";
    reg = <0x0E000000 0>;
    };
    };
    };

    #include "tps65217.dtsi"

    &tps {
    /*
    * Configure pmic to enter OFF-state instead of SLEEP-state ("RTC-only
    * mode") at poweroff. Most BeagleBone versions do not support RTC-only
    * mode and risk hardware damage if this mode is entered.
    *
    * For details, see linux-omap mailing list May 2015 thread
    * [PATCH] ARM: dts: am335x-bone* enable pmic-shutdown-controller
    * In particular, messages:
    * www.spinics.net/.../msg118585.html
    * www.spinics.net/.../msg118615.html
    *
    * You can override this later with
    * &tps { /delete-property/ ti,pmic-shutdown-controller; }
    * if you want to use RTC-only mode and made sure you are not affected
    * by the hardware problems. (Tip: double-check by performing a current
    * measurement after shutdown: it should be less than 1 mA.)
    */
    interrupts = <7>; /* NMI */
    interrupt-parent = <&intc>;

    ti,pmic-shutdown-controller;

    charger {
    interrupts = <0>, <1>;
    interrupt-names = "USB", "AC";
    status = "okay";
    };

    pwrbutton {
    interrupts = <2>;
    interrupt-names = "PB";
    status = "okay";
    };

    regulators {
    dcdc1_reg: regulator@0 {
    regulator-name = "vdds_dpr";
    regulator-always-on;
    };

    dcdc2_reg: regulator@1 {
    /* VDD_MPU voltage limits 0.95V - 1.325V with +/-4% tolerance */
    regulator-name = "vdd_mpu";
    regulator-min-microvolt = <925000>;
    regulator-max-microvolt = <1378000>;
    regulator-boot-on;
    regulator-always-on;
    };

    dcdc3_reg: regulator@2 {
    /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
    regulator-name = "vdd_core";
    regulator-min-microvolt = <925000>;
    regulator-max-microvolt = <1150000>;
    regulator-boot-on;
    regulator-always-on;
    };

    ldo1_reg: regulator@3 {
    regulator-name = "vio,vrtc,vdds";
    regulator-always-on;
    };

    ldo2_reg: regulator@4 {
    regulator-name = "vdd_3v3aux";
    regulator-always-on;
    };

    ldo3_reg: regulator@5 {
    regulator-name = "vdd_1v8";
    regulator-min-microvolt = <1800000>;
    regulator-max-microvolt = <1800000>;
    regulator-always-on;
    };

    ldo4_reg: regulator@6 {
    regulator-name = "vdd_3v3a";
    regulator-always-on;
    };
    };
    };

    &mac {
    slaves = <2>;
    pinctrl-names = "default", "sleep";
    pinctrl-0 = <&cpsw_default>;
    pinctrl-1 = <&cpsw_sleep>;
    dual_emac = <1>;
    // active_slave = <1>;
    status = "okay";
    };

    &davinci_mdio {
    pinctrl-names = "default", "sleep";
    pinctrl-0 = <&davinci_mdio_default>;
    pinctrl-1 = <&davinci_mdio_sleep>;
    status = "okay";
    };

    &cpsw_emac0 {
    phy_id = <&davinci_mdio>, <4>;
    phy-mode = "rgmii-txid";
    // dual_emac_res_vlan=<0>;
    };

    &cpsw_emac1 {
    phy_id = <&davinci_mdio>, <6>;
    phy-mode = "rgmii-txid";
    // dual_emac_res_vlan=<1>;
    };

    &tscadc {
    status = "okay";
    tsc {
    ti,wires = <4>;
    ti,x-plate-resistance = <200>;
    ti,coordinate-readouts = <5>;
    ti,wire-config = <0x00 0x11 0x22 0x33>;
    ti,charge-delay = <0x800>;
    };

    adc {
    ti,adc-channels = <0 1 2 3>;
    };
    };

    &mmc1 {
    status = "okay";
    vmmc-supply = <&vdd_3v3b>;
    bus-width = <4>;
    pinctrl-names = "default", "sleep";
    pinctrl-0 = <&mmc1_pins_default>;
    pinctrl-1 = <&mmc1_pins_sleep>;
    cd-gpios = <&gpio3 19 GPIO_ACTIVE_HIGH>;
    };

    &sham {
    status = "okay";
    };

    &aes {
    status = "okay";
    };

    &dcan0 {
    status = "okay";
    pinctrl-names = "default";
    pinctrl-0 = <&dcan0_pins_default>;
    };

    &wkup_m3_ipc {
    ti,scale-data-fw = "am335x-evm-scale-data.bin";
    };

    &rtc {
    system-power-controller;
    };

  • Additional information:
    The data-out GPIO run ok,
    The data-in GPIOs run fail.
    Why dts pinmux about gpmc-ad8~15 don't work?
  • user4823139,

    From what I understand you have problem with gpmc_ad10.gpio0_26 pin.

    I will suggest you to check the value in the pinmux register and verify it is correct. Check register conf_gpmc_ad10/0x44E10828 from user space with devmem2 or omapconf tool and make sure it has the correct value for gpio0_26 input.


    If the value is NOT correct, I would suggest you to make the below update in your kernel DTS file:

    - AM33XX_IOPAD(0x28, PIN_INPUT_PULLUP | PIN_INPUT | MUX_MODE7) /* (T11) gpmc_ad10.gpio0[26] */
    + AM33XX_IOPAD(0x828, PIN_INPUT_PULLUP | MUX_MODE7) /* (T11) gpmc_ad10.gpio0_26 */

    Also in kernel am335x-evm.dts file, this T11 pin is setup for LCD:

    lcd_pins_s0: lcd_pins_s0 {
    pinctrl-single,pins = <
    AM33XX_IOPAD(0x828, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad10.lcd_data21 */
    }

    Make sure you have removed this LCD pinmux from your kernel DTS file.

    Regards,
    Pavel