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RTOS/AM5728: Wrong data in SPI buffer

Ranganath V N
Intellectual 475 points

Part Number: AM5728

Tool/software: TI-RTOS

Hi,

we are connected the slave device to the spi1 line on dsp1 am5728,

we are missing some data, when we probe using logic analyzer we are able to see the correct/expected data over spi1 lines but inside the buffer we are getting the corrupt data.

configurations are as follows,

spi_params_s structure

SPI_MODE_BLOCKING, /*!< Blocking or Callback mode */
SPI_WAIT_FOREVER, /*!< Transfer timeout in system ticks */
NULL, /*!< Callback function pointer */
SPI_MASTER, /*!< Master or Slave mode */
5500000, /*!< SPI bit rate in Hz */
8, /*!< SPI data frame size in bits */
SPI_POL0_PHA0 , /*!< SPI frame format */
NULL

Thanks 

Ranganath

  • 0
    TI__Guru**** 393215 points
    Hi,

    Please read the note below Table 24-288 in the AM<572x TRM Rev. K and make sure you have configured the pinmux correctly:

    "For the spim_sclk signals to work properly, the INPUTENABLE bit of the appropriate CTRL_CORE_PAD_x registers should be set to 0x1 because of retiming purposes."
  • 0 in reply to Biser Gatchev-XID
    Intellectual 475 points
    thanks for the reply. YES, we are doing that correctly.
    That bit we are setting here
    regVal = 0x000C0000;
    ((CSL_padRegsOvly)CSL_MPU_CORE_PAD_IO_REGISTERS_REGS)->PAD_SPI1_D1 = regVal;

    regVal = 0x000C0000;
    ((CSL_padRegsOvly)CSL_MPU_CORE_PAD_IO_REGISTERS_REGS)->PAD_SPI1_D0 = regVal;

    regVal = 0x000C0000;
    ((CSL_padRegsOvly)CSL_MPU_CORE_PAD_IO_REGISTERS_REGS)->PAD_SPI1_SCLK = regVal;

    regVal = 0x00060000;
    ((CSL_padRegsOvly)CSL_MPU_CORE_PAD_IO_REGISTERS_REGS)->PAD_SPI1_CS2 = regVal;
  • 0 in reply to Ranganath V N
    TI__Guru** 116830 points
    Ranganath,

    Before we address the SPI question, we strongly recommend use TI Pinmux tool to set the pinmux and avoid changing IO settings from code running from DDR memory. the device has stringent IO delay setting requirements as explained in the application notes here:
    www.ti.com/.../sprac44a.pdf

    From software perspective, modifying Pinmux setting in PDK is described here:
    software-dl.ti.com/.../index_board.html
    software-dl.ti.com/.../presentation_html5.html (section 9.5)

    As far as the SPI param structure is concerned, there are few things to check. Does the SPI clock on the scope appear correct ? The SPI module clock is 48 Mhz so if you pick the driver to set bit rate as 5.5 Mhz, the module level divider will be non-integer value so please checkout the resulting clock.

    How did you update the SPI Params, did you use the SPI_Params_init before SPI_open and update the required parameters in the structure? Does the phase and polarity setting match with the values expected by the slave datasheet. Does setting lower bit rate resolve the issue. Please confirm that in your SPI_soc.c file, the HW attributes have DMA enabled ? Is it possible for you to see if you see the same issue in callback mode.

    Regards,
    Rahul
  • 0 in reply to Rahul Prabhu
    Intellectual 475 points

    Hi Rahul,

    Thanks for your reply. 

    All the following observations are from the Loopback code provided in example of SPI inside pdk.

    Yes we are updating the SPI Params before the SPI_open, we are using ublox gps as slave and its maxmimum frequency range is 5,5,Mhz bitforamt is PH0PL0. nothing changes with changing the frequency DMA is disabled. 

    Thanks

    Ranganath