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Errors in I2S Timing Section of TMS320C5515 Datasheet (TI lit#SPRS645B)

Other Parts Discussed in Thread: TMS320C5515

There appear to be errors in the I2S timing section of the TMS320C5515 datasheet (TI lit#SPRS645B).  Here is a summary of the errors we see:

  • The table entry for tsu(RXV-CLKH/L) has #7 in column 1, but this parameter corresponds to reference #6 of Figure 6-29.
  • The table entry for th(CLKH/L-RXV) has #8 in column 1, but this parameter corresponds to reference #7 of Figure 6-29.
  • The table entry for tsu(FSV-CLKH/L) has #9 in column 1, but this parameter corresponds to reference #8 of Figure 6-29.
  • The table entry for th(CLKH/L-FSV) has #10 in column 1, but there is no corresponding #10 in Figure 6-29.
  • The dotted line to the right of timing reference #9 in Figure 6-29 does not line up with any signal transitions.

Can someone please confirm these errors and insure that the corrections are made in the next datashee revision?

-Ruben

  • Ruben,

    I am surprised.  I checked them out and found that they were correct in the original version. I don't know what happened when we updated the datasheet. I will correct them in the next revision. 

    The reason #9 is not aligned to the clock transition is that FS is required to be latched on both clock edge. It will be the same in the next revision. 

    Regards,

    Peter Chung