Part Number: TMS320C6746
I use EDMA3+McBSP.
Transfers (480 bytes) start with period of 5 seconds. After each transfer started there are 3 interrupts raised:
1. EDMA3_0_CC0_ERRINT
2. EDMA3_0_CC0_INT1
3. EDMA3_0_CC0_ERRINT again
[05.06.2019 11:22:04] Start
[05.06.2019 11:22:04] Err 230: EMR=0 CCERR=0 QEMR=0 EEVAL=0
[05.06.2019 11:22:04] Stp 119
[05.06.2019 11:22:04] Err 231: EMR=4 CCERR=0 QEMR=0 EEVAL=0
[05.06.2019 11:22:09] Start
[05.06.2019 11:22:09] Err 232: EMR=0 CCERR=0 QEMR=0 EEVAL=0
[05.06.2019 11:22:09] Stp 11a
[05.06.2019 11:22:09] Err 233: EMR=4 CCERR=0 QEMR=0 EEVAL=0
As it seen, in 1st DMA Error interrupt all status registers = 0.
How can this be and how can I determine the cause of error?
