Tool/software: Linux
Hi,
We have several gpios that we use to trigger interrupts. Is there a way to tweak the priority of these interrupts so that one gpio pin would have higher priority than another gpio pin.
We are using RT Linux.
Thanks,
David
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Tool/software: Linux
Hi,
We have several gpios that we use to trigger interrupts. Is there a way to tweak the priority of these interrupts so that one gpio pin would have higher priority than another gpio pin.
We are using RT Linux.
Thanks,
David
Hi,
Linux kernel is not very flexible when it comes to IRQ prioritization & guaranteeing a certain scheduling delay (especially the non-RT linux kernels).
There is the possibility to use threads with different priorities within your system and call the ISR within these threads, as explained by Ron in this post:

From a hardware perspective ARM core provides some level of IRQ prioritization, see ARM TRM:

however you should also configure the IRQ_CROSSBAR to have the different gpio interrupts mapped to a correct interrupt lines of the ARM INTC.
Best Regards,
Yordan
Hi David,
You can try with nice value to adjust threads/processes priorities.

If that doesn't help you can adjust GPIO priorities in A15 GIC registers.
linux-4.14.79/arch/arm/boot/dts/dra7.dtsi
linux-4.14.79/drivers/irqchip/irq-gic.c
linux-4.14.79/Documentation/devicetree/bindings/interrupt-controller/arm,gic.txt
linux-4.14.79/drivers/irqchip/irq-crossbar.c
linux-4.14.79/Documentation/devicetree/bindings/arm/omap/crossbar.txt
Regards,
Pavel
Hi Yordan,
Thank for the response. We are more concerned about the situation described below than interrupt-delays:
Gpio pin-A and gpio-pin-B, both using level interrupts, and pin-A having higher priority. We want make sure the ISR for pin-A will be called when both pin-A and pin-B are raised.
1. pin-A and pin-B are both low.
2. pin-B set to Hi, pin-B ISR is called.
3. pin-A set to Hi (while pin-B ISR is still being executed)
4. pin-B ISR (from step 2) completed
5. <pin-A and pin-B are still Hi>
In step 5 we want to be sure pin-A ISR is called instead of pin-B ISR
Hi Pavel,
Thanks for the response.
Could you provide an example on which register I would need modify to make 1 GPIO have higher priority than another one. For example, if I wanted gpio5-7 to have higher priority than gpio7-3.
Thank you,
Regards,
David
Hi David,
Basically Pavel and I gave similar responses (link in my post and the community guide provided by Pavel). You need to handle the priority on a higher level, using the ISR in the context of a thread/process, which has higher priority.
There aren't much options available on a hw level. You can check ARM documentation (take a look at GICC_HPPIR):
Cortex A15 TRM: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0438i/BABDIEIH.html
GIC Architecture Specification: https://static.docs.arm.com/ihi0069/d/IHI0069D_gic_architecture_specification.pdf
Best Regards,
Yordan