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66AK2H06: twp interrupt routines makes CPU hang.

Part Number: 66AK2H06

Hi all,

I have two interrupt routines. First interrupt routine should not be interrupted by the second interrupt routine.

When the second interrupt routine is executed, if the first interrupt is coming, the second interrupt should be hold and CPU executes the first interrupt.

Here is the my setup in the second interrupt routine.

at the begin of the routine

uint32 chipReg[4];

chipReg[0] = CSL_chipReadReg (CSL_CHIP_IRP);                         // Interrupt Return Pointer Register
chipReg[1] = CSL_chipReadReg (CSL_CHIP_NRP);                        // Nonmaskable Interrupt (NMI) Return Pointer Register
chipReg[2] = CSL_chipReadReg (CSL_CHIP_ITSR);                      // Interrupt Task State Register
chipReg[3] = CSL_chipReadReg (CSL_CHIP_CSR);                      // Control Status Register
CSL_chipWriteReg (CSL_CHIP_CSR, chipReg[3] | 0x00000001); // enable nesting interrupt

........................

at the end of the routine

CSL_chipWriteReg (CSL_CHIP_CSR, chipReg[3] & 0xFFFFFFFE); //disable nesting interrupt
CSL_chipWriteReg (CSL_CHIP_ITSR, chipReg[2]);
CSL_chipWriteReg (CSL_CHIP_NRP, chipReg[1]);
CSL_chipWriteReg (CSL_CHIP_IRP, chipReg[0]);

//clear the interrupt event bit.
CSL_intcHwControl(hIntc[1], CSL_INTC_CMD_EVTCLEAR, NULL);

I sometimes found my CPU is hang.

Do you think if my setup is wrong?

Thank you.

Yao-Ting

  • Hi,

    You are doing nested interrupt on Keystone device. See http://processors.wiki.ti.com/index.php/Configuring_Interrupts_on_Keystone_Devices.

    The comments in the code snippet provide an explanation of what most of the code tries to achieve. Note that the call to function CSL_CPINTC_setNestingMode, with second argument CPINTC_NO_NESTING, configures "nesting" to be deactivated. The term "nesting" refers to a method that enables developers to configure CIC such that when a current interrupt is being serviced, certain specified interrupts are disabled. The typical usage is to nest on the current interrupt and disable all interrupts of the same or lower priority (or channel). Nesting mode is not supported in KeyStone devices. So the information is not in the user's guide and it is disabled in the above code snippet and in CSL examples.

    Also see: https://e2e.ti.com/support/processors/f/791/t/189559

    Regards, Eric