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Hi,
We are using a custom board, based on the AM335x Eval Board, and our NAND chip is from Micron (MT29F16G08ABACAWP-ITZ:C).
There are differences between versions of our board, but no any change between AM3352 and NAND chip since first version.
However, we found some version of our board need SYSBOOT[9] pull-up(high) and some need pull-down(low) for SYSBOOT[9].
According to the reference manual(SPRUH73P), initially high and low for SYSBOOT[9] indicates "ECC done by ROM or NAND".
Could we have more detail information about that?
We don't know why some board need SYSBOOT[9] pull-up and some are pull-down.
In wrong setting case, we can not boot up AM3352, and always see "CCC"...
Hi Jerry,
Have a look at the explanation right before Table 26-18. ECC Configuration for NAND Boot:
"In addition ECC computation done by the ROM can be turned off completely by using SYSBOOT[9]. This is particularly useful when interfacing with NAND devices that have built in ECC engines."
If you SYSBOOT[9] = 0x0 => ECC computation is done by ROM code.
If you use NAND with built in ECC engine => SYSBOOT[9] = 0x1 => ECC computation is handled by nand device.
See also below e2e threads for more info:
Sysboot 9 pin configuration for NAND Boot - Processors forum - Processors - TI E2E support forums
AM335x: NAND-Boot with ECC by NAND? - Processors forum - Processors - TI E2E support forums
AM3352: SYSBOOT[9] default state - Processors forum - Processors - TI E2E support forums
Also I see sysboot9 map to register control_status[17] waiten 0x0: ignore wait input, 0x1 use wait input
Regards,
Pavel