• State Resolved
  • Locked Locked
  • Replies 2 replies
  • Subscribers 99 subscribers
  • Views 396 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

What happens to SRIO on C6455 with a simultaneous DIO operation and SRIO message?

Bernie Thompson TI
Mastermind 41665 points

I was wondering what might happen if a DIO operation happened at the same time as a SRIO message is received on a C6455, is there any possibility of a conflict in this case that could cause data to be dropped?

  • 0
    TI__Guru* 84110 points

    Bernie,

    It is not obvious what the exact race condition is that you are considering, but the SRIO specification should cover all possible conditions like this. Since the SRIO lanes are technically point-to-point, there is not a possibility of collision between two drivers, so this should always be handled by the sourcing PHY to keep the two operations separated.

    Regards,
    RandyP

     

    If this answers your question, please click the  Verify Answer  button below. If not, please reply back with more information.

  • 0 in reply to RandyP
    TI__Mastermind 23525 points

    Bernie,

     

    At both the DMA interface side of the peripheral, as well as the pin side, all transactions are handled serially, there is no collision of packets.  A packet can only be dropped in our IP for the following reasons:

     

    Normal 0 false false false MicrosoftInternetExplorer4

    The following scenarios cause packets to be dropped:

     

    1) Stomped RX packet from the physical layer.  Various things here, for instance a packet is longer than 276B but passes CRC, then it actually is accepted by the physical layer (no NACK), but it is stomped when handed to the logical layer.  So packet is destroyed.  Another case would be if the ERR_DIS bit is set (bit 20 of the SP(n)_CTL register and there is a CRC error.  Here a bad CRC packet is accepted by the physical layer (no NACK), but is stomped again when given to the logical layer.  This bit is not set is it?

    2) If a packet comes in with the upper bit of the tt field set, it is dropped.

    3) Packet forwarding is enabled, and the packet doesn't match a local ID or a forwarding range, it is dropped.

    4) The RX I/O DMA access error, the packet is dropped because it is trying to access a restricted memory area.

    5) The TX side can drop a packet if DROP_EN (bit 2 of SP(n)_CTL) is set, depending on the status of STOP_ON_PORT_FAILED_ENC_EN (bit 3 of SP(n)_CTL) and ERROR_RATE_FAILED_THRES (bits 31:24 of SP(n)_ERR_THRESH).

     

    Let me know if I missed you point.

    Regards,

    Travis