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Linux/AM5728: How to change clock source (CLKCTRL Register) of timers and crossbar of IPUx from devicetree

Part Number: AM5728

Tool/software: Linux

Hello,

I want to change clock source of timers  and crossbar of IPUx from devicetree.

I found the way to change clock source of pwm, but cannot find  timer's.

Is there the way to change change clock source of timers  and crossbar of IPUx from devicetree? 

Best Regards,

Reona

  • Hi Reona,

    Do you use AM57x PSDK Linux v5.03 (kernel v4.14.79)?

    Do you use AM572x TI board (EVM, IDK, X15) or custom board?

    AM572x device has 16 GP Timers. Which timer exactly you need to change clock source and which source exactly you need to set?

    Regards,
    Pavel

  • Thank you for replying, Pavel.

    Yes, I use PSDK v5.03 and AM572x evm board.

    I need to change clock source of timer14 from sys_clk to xref_clk1.

    Now, it is changed from IPU1 by using CSL API like following.

        CSL_l4per_cm_core_componentRegs *l4PerCmReg =
            (CSL_l4per_cm_core_componentRegs *)(CSL_MPU_L4PER_CM_CORE_REGS + IPU_BASEADDR_OFFSET);
    
        /* timer14 clk sel system clock */
        CSL_FINST(l4PerCmReg->CM_L4PER3_TIMER14_CLKCTRL_REG,
                  L4PER_CM_CORE_COMPONENT_CM_L4PER3_TIMER14_CLKCTRL_REG_CLKSEL, SEL_XREF_CLK1  );

    And, Xbar configuration is change by using IPU's cfg file.

    var TimerSupport = xdc.useModule('ti.sysbios.family.shared.vayu.TimerSupport');
    TimerSupport.availMask = 0x2102; // Timer2,9,14
    dmTimer.timerSettings[13].intNum = 70;
    IntXbar.connectIRQMeta(70, 340); // CSL_XBAR_TIMER14_IRQ1

    I want to change these configuration from u-boot because easy to manage.

    Best Regards,

    Reona

  • Reona,

    To change timer14 clock source in u-boot, you need to modify dra7xx-clocks.dtsi or other of your DTS files (i.e. am57xx-beagle-x15-common.dtsi)

    u-boot/arch/arm/dts/dra7xx-clocks.dtsi

    u-boot/arch/arm/dts/am57xx-beagle-x15-common.dtsi

    You should use "assigned-clocks" and "assigned-clock-parents" entries.

    For example see how IPU1 clock is changed CM_IPU1_IPU1_CLKCTRL[24] CLKSEL in dra7xx-clocks.dtsi

    ipu1_gfclk_mux: ipu1_gfclk_mux@520 {
            #clock-cells = <0>;
            compatible = "ti,mux-clock";
            clocks = <&dpll_abe_m2x2_ck>, <&dpll_core_h22x2_ck>;
            ti,bit-shift = <24>;
            reg = <0x0520>;
            assigned-clocks = <&ipu1_gfclk_mux>;
            assigned-clock-parents = <&dpll_core_h22x2_ck>;
        };

     

    You should update timer14 as below:

    timer14_gfclk_mux: timer14_gfclk_mux@17d0 {
            #clock-cells = <0>;
            compatible = "ti,mux-clock";
            clocks = <&timer_sys_clk_div>, <&sys_32k_ck>, <&sys_clkin2>, <&ref_clkin0_ck>, <&ref_clkin1_ck>, <&ref_clkin2_ck>, <&ref_clkin3_ck>, <&abe_giclk_div>, <&video1_div_clk>, <&video2_div_clk>, <&hdmi_div_clk>;
            ti,bit-shift = <24>;
            reg = <0x17d0>;
             + assigned-clocks = <&timer14_gfclk_mux>;
             + assigned-clock-parents = <&ref_clkin1_ck>;
        };

     

    Another approach is to modify your DTS file where timer14 is enabled. See for example how McASP3 clock is changed CM_L4PER2_MCASP3_CLKCTRL[27:24] CLKSEL_AHCLKX

    am57xx-beagle-x15-common.dtsi

    &mcasp3 {
        #sound-dai-cells = <0>;
        assigned-clocks = <&mcasp3_ahclkx_mux>;
        assigned-clock-parents = <&sys_clkin2>;
        status = "okay";

     

    I will check also crossbar config and come back to you.

     

    Regards,
    Pavel

     

  • Reona,

    I have check u-boot code base, but I can not find IPU1 crossbar configuration option. We have only support for A15 MPU crossbar (crossbar_mpu), EDMA crossbar (edma_xbar) and SDMA crossbar (sdma_xbar). The same is valid for linux kernel.

    Seems that IPU1 crossbar config is available only in IPU Firmware.

    Regards,
    Pavel

  • Pavel,

    Thank you for polite reply.

    I had tried to do like your suggestion by reference to node of timer16_gfclk_mux, but E_freqMismatch was occured. Of course, This was not occured in case of changing from IPU firmware.

    This is my diff.

    diff --git a/arch/arm/boot/dts/dra7xx-clocks.dtsi b/arch/arm/boot/dts/dra7xx-clocks.dtsi
    index ed83e7b105f..22ae1ed1b4e 100644
    --- a/arch/arm/boot/dts/dra7xx-clocks.dtsi
    +++ b/arch/arm/boot/dts/dra7xx-clocks.dtsi
    @@ -2031,6 +2031,8 @@
                    clocks = <&timer_sys_clk_div>, <&sys_32k_ck>, <&sys_clkin2>, <&ref_clkin0_ck>, <&ref_clkin1_ck>, <&ref_clkin2_ck>, <&ref_clkin3_ck>, <&abe_giclk_div>, <&video1_div_clk>, <&video2_div_clk>, <&hdmi_div_clk>;
                    ti,bit-shift = <24>;
                    reg = <0x17d0>;
    +               assigned-clocks = <&timer14_gfclk_mux>;
    +               assigned-clock-parents = <&ref_clkin1_ck>;
            };
     
            timer15_gfclk_mux: timer15_gfclk_mux@17d8 {
    


    Is anything missing?

    Best Regards,
    Reona
  • Reona Shiode said:
    I had tried to do like your suggestion by reference to node of timer16_gfclk_mux,

    My suggestion was for timer14 (not timer16) u-boot update (not kernel).

    u-boot/arch/arm/dts/dra7xx-clocks.dtsi

    linux-kernel/arch/arm/boot/dts/dra7xx-clocks.dtsi

    Could you pleas clarify:

    - do you need to change clcok source of timer14 or timer16?

    - do you need this to be done in u-boot or in kernel?

    Regards,
    Pavel

  • Pavel, 

    I misunderstood.

    I updated u-boot then clock source was certainly changed.

    Many thanks!

    Regards,

    Reona