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Tool/software: TINA-TI or Spice Models
Hi,
I am using VSDK3.3 we have moved MCAN on A15 which was previously running on in ipu_0 core.
We have observed that whenever our mcan driver tries to call mcan api's provided by mcan module by ti, we are getting below exception
.Regards,
Bikash
Hi Rishabh,
The register value is 0x00000002 for register CM_WKUPAON_ADC_CLKCTRL (0x4AE0 78A0).
Regards,
Bikash
Hi Bikash,
Can you add a breakpoint when you run this particular use case to see why MCAN API raises an exception.
Easiest way will be to use while(loop) where loop is volatile int variable set to 1.
Have you disabled MCAN on IPU?
It is possible that MCAN PRCM is done by IPU and MCAN is not enabled before A15 tries to access registers.
Regards,
Rishabh
Hi Rishabh,
Exception is happening when we are doing write operation to the mcan register.
Such exception happens when peripheral clock is not enabled.
But we can see peripheral clock is enabled.
You have said to disable mcan from IPU, is there any register through which we can enable or disable mcan module for different core?
I didn't find any such register.
In the build I can see all can modules are build for A15 and lib linking is also for A15.
Regards,
Bikash
Hi Bikash,
Are you able to see the MCAN space from CCS memory window (via A15) when the write is attempted?
What happens in case you connect DSP or IPU at the same time and try to write to MCAN MMRs?
You should remove the MCAN API calls from IPU.
Regards,
Rishabh
Hi Rishabh,
We are not calling any MCAN API's from IPU, only use cases are there on IPU so uses case form IPU are trying to connect to can link on A15 which initiate mcan initialization.
I can see Mcan register only for A15 core not for IPU in register window.
I also cross checked by putting a break point it is getting hit only by A15 not IPU.
We have already shared our complete source code with Lucas, can you have a look at it?
Regards,
Bikash
Hi Bikash,
Can you answer my previous questions?
"Are you able to see the MCAN space from CCS memory window (via A15) when the write is attempted?
What happens in case you connect DSP or IPU at the same time and try to write to MCAN MMRs?"
Regards,
Rishabh
Hi Rishabh,
I guess this is what you are asking for.
You can see memory region is via A15 when we try to write to mcan registers.
I can see mcan registers for DSP too in memory window but we are not using mcan on DSP core nor we are making any mcan api call from this core.
Regards,
Bikash
Hi Bikash,
Yes I am asking this but you need to read from a different address i.e. register space 0x42C0 1900.
Regards,
Rishabh
Hi Rishabh,
You can see memory region is via A15 when we try to write to mcan registers for register space 0x42C01900.
We are getting exception when we are trying to read the register.
Regards,
Bikash
Hi Bikash,
PRCM is enabled as seen from memory window and you are able to read PID via A15 debugger path.
Have you mapped this space in A15 MMU? Can you share your A15 cfg file.
Regards,
Rishabh
Hi Rishabh,
Do we do peripheral memory mapping for core separately?
Could you please point me out where my config file would be located with mcan mapping for cores?
Regards,
Bikash
Hi,
Every CPU has its own MMU that is configured differently.
I am not sure where is a15 cfg in your code base, VSDK has it here: PROCESSOR_SDK_VISION_03_06_00_00\vision_sdk\links_fw\src\rtos\bios_app_common\tda2px\a15_0\a15_0.cfg
Regards,
Rishabh
Hi Rishabh,
I have attached the config files for both IPU and A15.
I can see these are generic memory config files, I don't see any peripheral memory mapping.
Regards,
Bikash6318.a15_0.cfgIpu1_0.cfg
Hi Bikash,
Peripheral memories need not be mapped in a different manner.
MMU mapping is present for MCAN MMRs in A15 cfg file.
I will check with MCAN expert next week once he is back from vacation.
Regards,
Rishabh
Hi Rishabh,
The exception issue is resolved.
It was causing due to some mismatch in MCAN address.
However I can see Can is initialized and we are getting acknowledgement for any RX message we are transmitting through the Canalyzer.
But we are not getting any interrupt for Rx as well as Tx.
I can see interrupt Enable register are set,
I suspect it may be due to Cross bar mapping.
I have attached the source files please have a look and let me know if the mapping is correct.
/*******************************************************************************
* Company : HARMAN
*
* File Name : harman_module_mcan_proto_A.c
*
* Version : 01.00.00
*
* Date : 11-June-2018
*
* Operating Environment : TDA2Px
*
* Compiler with Version Number : ti-cgt-arm_16.9.2.LTS
*
* Description : API's for MCAN internally using MCAN drivers
*
* Created by : HARMAN
*
* Copyright (C) 2018 by HARMAN
* All rights reserved.
* This code contains information that is proprietary to HARMAN
* No part of this code may be reproduced or used in whole or part in any form
* or by any means - graphic, electronic or mechanical without the written
* permission of HARMAN
*******************************************************************************/
/*******************************************************************************
** Revision History **
*******************************************************************************/
/*
* V01.00.00: 11-Jun-2018 : Initial Version
*/
/******************************************************************************/
/*==============================================================================
Following are the MISRA C Violations
=============================================================================*/
/*
*/
/*==============================================================================
** Include Section **
==============================================================================*/
#include "harman_module_mcan_proto_A.h"
/*******************************************************************************
* Defines / Globals
*******************************************************************************
*/
volatile uint32_t gMcanTxIsrFlag = 1U;
volatile uint32_t gMcanRxIsrFlag = 1U;
volatile int32_t gRxFifoMsgCntr = 0;
volatile int32_t gRxFifo0MsgCntr = 0;
volatile int32_t gRxBuffCntr = 0;
volatile int32_t gIsrCounter = 0;
MCAN_ConfigParams configParams;
MCAN_BitTimingParams bitTimes;
MCAN_RxFIFOStatus rxFIFO1status;
MCAN_RxFIFOStatus rxFIFO0status;
/*==============================================================================
** Function Definitions **
==============================================================================*/
/*******************************************************************************
* Function Name : enableMcanModule
*
* Service Id : NA
*
* Description : MCAN module enable API
*
* PreConditions :
*
* Parameters :
*
* Called functions :
*
* Global Data :
*
* Return Value : NA
*
*******************************************************************************/
void enableMcanModule()
{
/* Enable MCAN module */
HW_WR_FIELD32(SOC_L4PER_CM_CORE_BASE+CM_L4PER2_DCAN2_CLKCTRL,
CM_L4PER2_DCAN2_CLKCTRL_MODULEMODE,
CM_L4PER2_DCAN2_CLKCTRL_MODULEMODE_ENABLE);
while (CM_L4PER2_DCAN2_CLKCTRL_IDLEST_FUNC !=
HW_RD_FIELD32(SOC_L4PER_CM_CORE_BASE+CM_L4PER2_DCAN2_CLKCTRL,
CM_L4PER2_DCAN2_CLKCTRL_IDLEST))
{
/* Wait till MCAN module is enabled */
}
}
/*******************************************************************************
* Function Name : configureMCANModule
*
* Service Id : NA
*
* Description : This API will configure MCAN module.
*
* PreConditions : This API is only to be called once before init of MCAN.
*
* Parameters :
*
* Called functions :
*
* Global Data :
*
* Return Value : status of configuring MCAN module
*
*******************************************************************************/
int32_t configureMCANModule(void)
{
int32_t status = STW_SOK;
uint32_t postDivider;
padConfigPrcmEnable();
postDivider = 24U;
/* Set the postDividers reg */
HW_WR_FIELD32(SOC_CTRL_MODULE_CORE_CORE_REGISTERS_BASE+CTRL_CORE_SMA_SW_0,
CTRL_CORE_SMA_SW_0_MCAN_CLK_HSDIV,
postDivider);
/* Select the mux value */
HW_WR_FIELD32(SOC_CTRL_MODULE_CORE_CORE_REGISTERS_BASE+CTRL_CORE_SMA_SW_0,
CTRL_CORE_SMA_SW_0_MCAN_CLK_TENABLEDIV,
1U);
/* Select the Toggle sequence 010 */
HW_WR_FIELD32(SOC_CTRL_MODULE_CORE_CORE_REGISTERS_BASE+CTRL_CORE_SMA_SW_0,
CTRL_CORE_SMA_SW_0_MCAN_CLK_HSDIV_LATCH_EN,
0U);
HW_WR_FIELD32(SOC_CTRL_MODULE_CORE_CORE_REGISTERS_BASE+CTRL_CORE_SMA_SW_0,
CTRL_CORE_SMA_SW_0_MCAN_CLK_HSDIV_LATCH_EN,
1U);
HW_WR_FIELD32(SOC_CTRL_MODULE_CORE_CORE_REGISTERS_BASE+CTRL_CORE_SMA_SW_0,
CTRL_CORE_SMA_SW_0_MCAN_CLK_HSDIV_LATCH_EN,
0U);
/* Enable the HSDIV post div clock */
HW_WR_FIELD32(SOC_CTRL_MODULE_CORE_CORE_REGISTERS_BASE+CTRL_CORE_SMA_SW_0,
CTRL_CORE_SMA_SW_0_MCAN_CLK_HSDIV_EN,
1U);
return status;
}
/*******************************************************************************
* Function Name : transmitMsgOverMCAN
*
* Service Id : NA
*
* Description : This API will transmit the message.
*
* PreConditions :
*
* Parameters : txMsg - refer structure MCAN_TxBufElement.
*
* Called functions : MCAN_txBufTransIntrEnable, MCAN_writeMsgRam,
* MCAN_getProtocolStatus
*
* Global Data :
*
* Return Value : status of transmit CAN message
*
*******************************************************************************/
int32_t transmitMsgOverMCAN(MCAN_TxBufElement *txMsg )
{
int32_t status = STW_EFAIL, protocolStatus = STW_SOK;
uint32_t txBufNum;
uint32_t txBufStatus;
MCAN_ProtocolStatus protStatus;
//MCAN_TxFIFOStatus txFIFOStatus;
#ifdef TX_FIFO_ENABLE
MCAN_getTxFIFOQueStatus(MCAN_MODULE, &txFIFOStatus);
txBufNum = txFIFOStatus.putIdx;
/* Enable Transmission interrupt */
status = MCAN_txBufTransIntrEnable(MCAN_MODULE,
txBufNum,
(uint32_t)TRUE);
/* write the message into MessageRAM for transmission */
MCAN_writeMsgRam(MCAN_MODULE,
MCAN_MEM_TYPE_FIFO,
txBufNum,
txMsg);
#else
txBufStatus = MCAN_getTxBufReqPend(MCAN_MODULE);
for(txBufNum = 0; txBufNum < MCAN_TX_BUFF_SIZE ; txBufNum++ )
{
if(MCAN_TX_BUFF_TRASMISSION_REQUEST_PENDING != ((txBufStatus >> txBufNum) & (MCAN_TX_BUFF_TRASMISSION_REQUEST_PENDING)))
{
break;
}
}
/* Enable Transmission interrupt */
status = MCAN_txBufTransIntrEnable(MCAN_MODULE,
txBufNum,
(uint32_t)TRUE);
/* write the message into MessageRAM for transmission */
MCAN_writeMsgRam(MCAN_MODULE,
MCAN_MEM_TYPE_BUF,
txBufNum,
txMsg);
#endif
/* Add request for transmission */
status += MCAN_txBufAddReq(MCAN_MODULE, txBufNum);
if (STW_SOK != status)
{
status = STW_EFAIL;
}
/* wait untill transmit complete occurs */
while (gMcanTxIsrFlag)
{}
gMcanTxIsrFlag = 1U;
/* check for errors */
MCAN_getProtocolStatus(MCAN_MODULE, &protStatus);
/* Checking for Errors */
if (((MCAN_ERR_CODE_NO_ERROR == protStatus.lastErrCode) ||
(MCAN_ERR_CODE_NO_CHANGE == protStatus.lastErrCode)) &&
((MCAN_ERR_CODE_NO_ERROR == protStatus.dlec) ||
(MCAN_ERR_CODE_NO_CHANGE == protStatus.dlec)) &&
(0U == protStatus.pxe))
{
protocolStatus = STW_SOK;// no errors;
}
else
{
protocolStatus = STW_EFAIL;
}
if(STW_EFAIL == protocolStatus)
{
status = protocolStatus;
}
return status;
}
/*******************************************************************************
* Function Name : enableInterrupts
*
* Service Id : NA
*
* Description : This API will enable the interrupt for MCAN
*
* PreConditions :
*
* Parameters :
*
* Called functions : MCAN_enableIntr
*
* Global Data :
*
* Return Value : NA
*
*******************************************************************************/
void enableInterrupts()
{
/* Enable Interrupts */
// MCAN_enableIntr(MCAN_MODULE, MCAN_INTR_MASK_ALL, (uint32_t)TRUE);
MCAN_enableIntr(MCAN_MODULE, MCAN_INTR_MASK_TXRX, (uint32_t)TRUE);
MCAN_enableIntr(MCAN_MODULE,
MCAN_INTR_SRC_RES_ADDR_ACCESS, (uint32_t)FALSE);
}
/*******************************************************************************
* Function Name : selectTxIntrLine
*
* Service Id : NA
*
* Description : This API will select the interrupt line for Tx
*
* PreConditions : enableInterrupts should be called at least once before this API call
*
* Parameters :
*
* Called functions : MCAN_selectIntrLine, MCAN_enableIntrLine
*
* Global Data :
*
* Return Value : NA
*
*******************************************************************************/
void selectTxIntrLine()
{
/* Select Interrupt Line */
MCAN_selectIntrLine(MCAN_MODULE,
MCAN_INTR_MASK_TX,
MCAN_INTR_LINE_NUM_0);
/* Enable Interrupt Line */
MCAN_enableIntrLine(MCAN_MODULE,
MCAN_INTR_LINE_NUM_0,
1U);
}
/*******************************************************************************
* Function Name : selectRxIntrLine
*
* Service Id : NA
*
* Description : This API will select the interrupt line for Rx
*
* PreConditions : enableInterrupts should be called at least once before this API call
*
* Parameters :
*
* Called functions : MCAN_selectIntrLine, MCAN_enableIntrLine
*
* Global Data :
*
* Return Value : NA
*
*******************************************************************************/
void selectRxIntrLine()
{
/* Select Interrupt Line */
MCAN_selectIntrLine(MCAN_MODULE,
MCAN_INTR_MASK_RX,
MCAN_INTR_LINE_NUM_1);
/* Enable Interrupt Line */
MCAN_enableIntrLine(MCAN_MODULE,
MCAN_INTR_LINE_NUM_1,
1U);
}
/*******************************************************************************
* Function Name : receiveMsgOverMCAN
*
* Service Id : NA
*
* Description : This API will read the received CAN message
*
* PreConditions :
*
* Parameters : rxMsg - refer the structure MCAN_RxBufElement
*
* Called functions : MCAN_getErrCounters, MCAN_getNewDataStatus,
* MCAN_clearNewDataStatus, MCAN_readMsgRam,
* MCAN_getRxFIFOStatus, MCAN_writeRxFIFOAck
*
* Global Data :
*
* Return Value : NA
*
*******************************************************************************/
int32_t receiveMsgOverMCAN(MCAN_RxBufElement *rxMsg, MCAN_ErrCntStatus* errCounter)
{
int32_t status = STW_EFAIL;
MCAN_RxNewDataStatus newDataStatus;
// MCAN_ErrCntStatus errCounter;
gMcanRxIsrFlag = 1U;
/* Checking for Errors */
MCAN_getErrCounters(MCAN_MODULE, errCounter);
if ((0U == errCounter->recErrCnt) &&
(0U == errCounter->canErrLogCnt))
{
MCAN_getNewDataStatus(MCAN_MODULE, &newDataStatus);
MCAN_clearNewDataStatus(MCAN_MODULE, &newDataStatus);
if (gRxBuffCntr > 0U)
{
MCAN_readMsgRam(MCAN_MODULE,
MCAN_MEM_TYPE_BUF,
0U,
0U,
rxMsg);
gRxBuffCntr--;
gIsrCounter--;
}
else if (gRxFifoMsgCntr > 0U)
{
rxFIFO1status.num = MCAN_RX_FIFO_NUM_1;
MCAN_getRxFIFOStatus(MCAN_MODULE, &rxFIFO1status);
MCAN_readMsgRam(MCAN_MODULE,
MCAN_MEM_TYPE_FIFO,
0U,
MCAN_RX_FIFO_NUM_1,
rxMsg);
MCAN_writeRxFIFOAck(MCAN_MODULE, MCAN_RX_FIFO_NUM_1, rxFIFO1status.getIdx);
gIsrCounter--;
gRxFifoMsgCntr--;
}
else if (gRxFifo0MsgCntr > 0U)
{
rxFIFO0status.num = MCAN_RX_FIFO_NUM_0;
MCAN_getRxFIFOStatus(MCAN_MODULE, &rxFIFO0status);
MCAN_readMsgRam(MCAN_MODULE,
MCAN_MEM_TYPE_FIFO,
0U,
MCAN_RX_FIFO_NUM_0,
rxMsg);
MCAN_writeRxFIFOAck(MCAN_MODULE, MCAN_RX_FIFO_NUM_0, rxFIFO0status.getIdx);
gIsrCounter--;
gRxFifo0MsgCntr--;
}
status = STW_SOK;
}
return status;
}
/*******************************************************************************
* Function Name : padConfigPrcmEnable
*
* Service Id : NA
*
* Description : This API will do the pad configuration required for MCAN
*
* PreConditions :
*
* Parameters :
*
* Called functions :
*
* Global Data :
*
* Return Value : NA
*
*******************************************************************************/
void padConfigPrcmEnable()
{
/*Pad configurations - MCAN */
/* Configure mcan_tx, mcan_rx pads on dcan1_tx and dcan1_rx pads */
HW_WR_FIELD32(SOC_CTRL_MODULE_CORE_CORE_PAD_REGISTERS_BASE+CTRL_CORE_CONTROL_SPARE_RW,
CTRL_CORE_CONTROL_SPARE_RW_SEL_ALT_MCAN,
CTRL_CORE_CONTROL_SPARE_RW_SEL_ALT_MCAN_MCAN_DCAN1_PADS);
HW_WR_REG32(SOC_CORE_PAD_IO_REGISTERS_BASE+CTRL_CORE_PAD_DCAN1_TX,0x00040000);
HW_WR_REG32(SOC_CORE_PAD_IO_REGISTERS_BASE+CTRL_CORE_PAD_DCAN1_RX,0x00040000);
/* Enable MCAN clock. */
HW_WR_FIELD32(SOC_WKUPAON_CM_BASE+CM_WKUPAON_ADC_CLKCTRL,
CM_WKUPAON_ADC_CLKCTRL_MODULEMODE,
CM_WKUPAON_ADC_CLKCTRL_MODULEMODE_ENABLE);
while (CM_WKUPAON_ADC_CLKCTRL_IDLEST_FUNC !=
HW_RD_FIELD32(SOC_WKUPAON_CM_BASE+CM_WKUPAON_ADC_CLKCTRL,
CM_WKUPAON_ADC_CLKCTRL_IDLEST))
{
/* wait for module to be enabled */
}
}
/*******************************************************************************
* Function Name : setConfigParams
*
* Service Id : NA
*
* Description : This API will configure the params for global filter
*
* PreConditions :
*
* Parameters : gMcan_globalFilterConfig - refer the structure MCAN_GlobalFiltConfig
*
* Called functions :
*
* Global Data :
*
* Return Value : NA
*
*******************************************************************************/
void setConfigParams(MCAN_GlobalFiltConfig *gMcan_globalFilterConfig)
{
/* Initialize MCAN Config params */
configParams.monEnable = 0x0U;
configParams.asmEnable = 0x0U;
configParams.tsPrescalar = 0xFU;
configParams.tsSelect = 0x0U;
configParams.timeoutSelect = MCAN_TIMEOUT_SELECT_CONT;
configParams.timeoutPreload = 0xFFFFU;
configParams.timeoutCntEnable = 0x0U;
configParams.filterConfig.rrfs = gMcan_globalFilterConfig->rrfs; //0x1U;
configParams.filterConfig.rrfe = gMcan_globalFilterConfig->rrfe; //0x1U;
configParams.filterConfig.anfe = gMcan_globalFilterConfig->anfe; //0x1U;
configParams.filterConfig.anfs = gMcan_globalFilterConfig->anfs; //0x1U;
}
/*******************************************************************************
* Function Name : setMsgRAMParams
*
* Service Id : NA
*
* Description : This API will configure the params for Message RAM
*
* PreConditions :
*
* Parameters : mcan_msgRAMConfigParams - refer the structure MCAN_MsgRAMConfigParams
*
* Called functions :
*
* Global Data :
*
* Return Value : NA
*
*******************************************************************************/
void setMsgRAMParams(MCAN_MsgRAMConfigParams* mcan_msgRAMConfigParams)
{
/* Initialize Message RAM Sections Configuration Parameters */
mcan_msgRAMConfigParams->flssa = MCAN_STD_ID_FILT_START_ADDR;
mcan_msgRAMConfigParams->flesa = MCAN_EXT_ID_FILT_START_ADDR;
mcan_msgRAMConfigParams->txStartAddr = MCAN_TX_BUFF_START_ADDR;
mcan_msgRAMConfigParams->txEventFIFOStartAddr = MCAN_TX_EVENT_START_ADDR;
mcan_msgRAMConfigParams->rxFIFO0startAddr = MCAN_FIFO_0_START_ADDR;
mcan_msgRAMConfigParams->rxFIFO1startAddr = MCAN_FIFO_1_START_ADDR;
mcan_msgRAMConfigParams->rxBufStartAddr = MCAN_RX_BUFF_START_ADDR;
mcan_msgRAMConfigParams->rxBufElemSize = MCAN_ELEM_SIZE_64BYTES;
mcan_msgRAMConfigParams->rxFIFO0ElemSize = MCAN_ELEM_SIZE_64BYTES;
mcan_msgRAMConfigParams->rxFIFO1ElemSize = MCAN_ELEM_SIZE_64BYTES;
}
/*******************************************************************************
* Function Name : initBitTimings
*
* Service Id : NA
*
* Description : This API will configure the bit timings of MCAN
*
* PreConditions :
*
* Parameters :
*
* Called functions :
*
* Global Data :
*
* Return Value : NA
*
*******************************************************************************/
void initBitTimings()
{
/* Initialize bit timings
* Configuring 1Mbps and 5Mbps as nominal and data bit-rate respectively */
bitTimes.nomRatePrescalar = 0x9U;
bitTimes.nomTimeSeg1 = 0xAU;
bitTimes.nomTimeSeg2 = 0x3U;
bitTimes.nomSynchJumpWidth = 0x3U;
bitTimes.dataRatePrescalar = 0x1U;
bitTimes.dataTimeSeg1 = 0x3U;
bitTimes.dataTimeSeg2 = 0x2U;
bitTimes.dataSynchJumpWidth = 0x0U;
}
/*******************************************************************************
* Function Name : initAndConfigMCAN
*
* Service Id : NA
*
* Description : This API will init and config the MCAN
*
* PreConditions :
*
* Parameters : mcan_initParams - refer the structure MCAN_InitParams
* mcan_msgRAMConfigParams - refer the structure MCAN_MsgRAMConfigParams
* mcan_stdFiltelem - refer the structure MCAN_StdMsgIDFilterElement
* mcan_globalFilterConfig - refer the structure MCAN_GlobalFiltConfig
* mcan_extIdFiltelem - refer the structure MCAN_ExtMsgIDFilterElement
*
* Called functions : setConfigParams, setMsgRAMParams, initBitTimings,
* MCAN_isFDOpEnable, MCAN_isMemInitDone, MCAN_setOpMode
* MCAN_getOpMode, MCAN_init, MCAN_config, MCAN_setBitTime,
* MCAN_setExtIDAndMask, MCAN_msgRAMConfig, MCAN_addStdMsgIDFilter,
* MCAN_addExtMsgIDFilter,
*
* Global Data :
*
* Return Value : status of init and config of MCAN
*
*******************************************************************************/
int32_t initAndConfigMCAN( MCAN_InitParams* mcan_initParams,
MCAN_MsgRAMConfigParams* mcan_msgRAMConfigParams,
MCAN_StdMsgIDFilterElement* mcan_stdFiltelem,
MCAN_GlobalFiltConfig* mcan_globalFilterConfig,
MCAN_ExtMsgIDFilterElement* mcan_extIdFiltelem
)
{
uint32_t fdoe;
int32_t configStatus = STW_SOK;
//setInitParams(mcan_initParams);
setConfigParams(mcan_globalFilterConfig);
setMsgRAMParams(mcan_msgRAMConfigParams);
//setFilterElement(mcan_stdFiltelem);
initBitTimings();
/* Enable Auto wakeup */
fdoe = MCAN_isFDOpEnable(MCAN_MODULE);
if ((uint32_t)TRUE != fdoe)
{
configStatus = STW_EFAIL;
}
/* wait for memory initialization to happen */
while (FALSE == MCAN_isMemInitDone(MCAN_MODULE))
{}
/* Put MCAN in SW initialization mode */
MCAN_setOpMode(MCAN_MODULE, MCAN_OPERATION_MODE_SW_INIT);
while (MCAN_OPERATION_MODE_SW_INIT != MCAN_getOpMode(MCAN_MODULE))
{}
/* Initialize MCAN module */
MCAN_init(MCAN_MODULE, mcan_initParams);
/* Configure MCAN module */
MCAN_config(MCAN_MODULE, &configParams);
/* Configure Bit timings */
MCAN_setBitTime(MCAN_MODULE, &bitTimes);
/* Set Extended ID Mask */
MCAN_setExtIDAndMask(MCAN_MODULE, MCAN_EXT_ID_AND_MASK);
/* Configure Message RAM Sections */
MCAN_msgRAMConfig(MCAN_MODULE, mcan_msgRAMConfigParams);
/* Configure Standard ID filter element */
MCAN_addStdMsgIDFilter(MCAN_MODULE, 0U, mcan_stdFiltelem);
/* Configure Extended ID filter element */
MCAN_addExtMsgIDFilter(MCAN_MODULE, 0U, mcan_extIdFiltelem);
/* Take MCAN out of the SW initialization mode */
MCAN_setOpMode(MCAN_MODULE, MCAN_OPERATION_MODE_NORMAL);
while (MCAN_OPERATION_MODE_NORMAL != MCAN_getOpMode(MCAN_MODULE))
{}
return configStatus;
}
/*******************************************************************************
* Function Name : resetTxIsrFlag
*
* Service Id : NA
*
* Description : This API will reset the Tx ISR flag
*
* PreConditions :
*
* Parameters :
*
* Called functions :
*
* Global Data : gMcanTxIsrFlag
*
* Return Value : NA
*
*******************************************************************************/
void resetTxIsrFlag()
{
gMcanTxIsrFlag = 0U;
}
/*******************************************************************************
* Function Name : resetRxIsrFlag
*
* Service Id : NA
*
* Description : This API will reset the Rx ISR flag, and increment the RX and ISR counters
*
* PreConditions :
*
* Parameters :
*
* Called functions :
*
* Global Data : gMcanRxIsrFlag, gIsrCounter, gRxBuffCntr
*
* Return Value : NA
*
*******************************************************************************/
void resetRxIsrFlag()
{
gMcanRxIsrFlag = 0U;
gIsrCounter++;
gRxBuffCntr++;
}
/*******************************************************************************
* Function Name : resetRxIsrFlagFifoFlag
*
* Service Id : NA
*
* Description : This API will reset the Rx ISR flag, and increment the RX, FIFO and ISR counters
*
* PreConditions :
*
* Parameters :
*
* Called functions :
*
* Global Data : gMcanRxIsrFlag, gRxFifoMsgCntr, gIsrCounter
*
* Return Value : NA
*
*******************************************************************************/
void resetRxIsrFlagFifoFlag(uint8_t fifoBuff0)
{
gMcanRxIsrFlag = 0U;
if(0U == fifoBuff0)
{
gRxFifoMsgCntr++;
}
else if(1U == fifoBuff0)
{
gRxFifo0MsgCntr++;
}
gIsrCounter++;
}
/*******************************************************************************
* Function Name : getIsrCntr
*
* Service Id : NA
*
* Description : This API will return the ISR counter variable address
*
* PreConditions :
*
* Parameters :
*
* Called functions :
*
* Global Data : gIsrCounter
*
* Return Value : NA
*
*******************************************************************************/
void getIsrCntr(int32_t *cntr)
{
*cntr = gIsrCounter;
}
/*******************************************************************************
* Company : HARMAN
*
* File Name : harman_utils_mcan_proto_A.c
*
* Version : 01.00.00
*
* Date : 11-June-2018
*
* Operating Environment : TDA2Px
*
* Compiler with Version Number : ti-cgt-arm_16.9.2.LTS
*
* Description : Init, configure, transmit and receive API's for MCAN
*
* Created by : HARMAN
*
* Copyright (C) 2018 by HARMAN
* All rights reserved.
* This code contains information that is proprietary to HARMAN
* No part of this code may be reproduced or used in whole or part in any form
* or by any means - graphic, electronic or mechanical without the written
* permission of HARMAN
*******************************************************************************/
/*******************************************************************************
** Revision History **
*******************************************************************************/
/*
* V01.00.00: 11-Jun-2018 : Initial Version
*/
/******************************************************************************/
/*==============================================================================
Following are the MISRA C Violations
=============================================================================*/
/*
*/
/*==============================================================================
** Include Section **
==============================================================================*/
#include <stdint.h>
#include <string.h>
#include <xdc/std.h>
#include <ti/csl/csl_types.h>
#include <ti/drv/vps/include/common/bsp_utils.h>
#include <ti/csl/hw_types.h>
#include <ti/drv/stw_lld/platform/irq_xbar_interrupt_ids.h>
#include <ti/csl/soc.h>
#include <ti/drv/stw_lld/platform/platform.h>
#include "include/link_api/system.h"
#include "include/link_api/system_common.h"
#include "harman_utils_mcan_proto_A.h"
#define DEBUG_UTILS_MCAN
/*==============================================================================
** Global Data **
==============================================================================*/
MCAN_TxBufElement transmitMsg;
MCAN_RxBufElement receiveMsg;
MCAN_InitParams gMcan_initParams;
MCAN_MsgRAMConfigParams gMcan_msgRAMConfigParams;
MCAN_StdMsgIDFilterElement gMcan_stdFiltelem;
MCAN_GlobalFiltConfig gMcan_globalFilterConfig;
MCAN_ExtMsgIDFilterElement gMcan_extIdFiltelem;
uint32_t rxIsrFlagStatus = 0U;
uint32_t txIsrFlagStatus = 0U;
uint32_t gCntrForIsr = 0U;
uint32_t gCntrForData = 0U;
uint32_t xBarOnlyOnce = 0U;
volatile uint64_t can_isr_tx_success_counter = 0U;
volatile uint64_t can_isr_rx_counter = 0U;
volatile uint64_t can_recv_read_success = 0U;
static uint64_t time_delta_ISR[1600] = {0};
static uint64_t time_delta_ReceiveRead[1600] = {0};
#ifdef EVENT_RX
Event_Handle mcanRxEvent;
Event_Struct mcanRxEventMem;
Event_Handle mcanRxQueueEvent;
Event_Struct mcanRxQueueEventMem;
Utils_QueHandle rxMsgQueueHandle;
#endif
MCAN_RxBufElement *rxQueue[MAX_QUEUE_SIZE];
MCAN_RxBufElement rxdata[MAX_QUEUE_SIZE];
MCAN_ECCErrStatus gMcaneccErr;
static Bool rxMsgFlag = FALSE;
void initAndConfigMCANParams( mcanInitParams* initParams,
mcanMsgRAMConfigParams* configRamParams,
mcanFilterConfig* globalfilterParams,
mcanStdMsgIDFilterElement *stdIdFilter,
mcanExtMsgIDFilterElement *extIdFilter
);
/*==============================================================================
** Function Definitions **
==============================================================================*/
/*******************************************************************************
* Function Name : mcanTxISR
*
* Service Id : NA
*
* Description : Transmit ISR for the MCAN
*
* PreConditions :
*
* Parameters : NA
*
* Called functions : MCAN_getIntrStatus, MCAN_clearIntrStatus,
* resetTxIsrFlag,
*
* Global Data : MCAN_MODULE, MCAN_INTR_SRC_TRANS_COMPLETE
*
* Return Value : NA
*
*******************************************************************************/
void mcanTxISR(void)
{
uint32_t intrStatus;
intrStatus = MCAN_getIntrStatus(MCAN_MODULE);
MCAN_clearIntrStatus(MCAN_MODULE, intrStatus);
if (MCAN_INTR_SRC_TRANS_COMPLETE ==
(intrStatus & MCAN_INTR_SRC_TRANS_COMPLETE))
{
++can_isr_tx_success_counter;
resetTxIsrFlag();//gMcanTxIsrFlag = 0U;
}
else if (MCAN_INTR_SRC_BUS_OFF_STATUS == (intrStatus & MCAN_INTR_SRC_BUS_OFF_STATUS))
{
Vps_printf(" UTILS: MCAN Tx (BUS OFF Error Occurred)Interrupt Status: %x !!!\n", intrStatus);
}
else
{
Vps_printf(" UTILS: MCAN Tx Interrupt Status: %x !!!\n", intrStatus);
}
}
#ifdef EVENT_RX
/*******************************************************************************
* Function Name : mcanRxISR
*
* Service Id : NA
*
* Description : Receive ISR for the MCAN
*
* PreConditions :
*
* Parameters : NA
*
* Called functions : MCAN_getIntrStatus, MCAN_clearIntrStatus,
* resetRxIsrFlag, resetRxIsrFlagFifoFlag
* Event_post
*
* Global Data : MCAN_MODULE, MCAN_INTR_SRC_DEDICATED_RX_BUFF_MSG,
* MCAN_INTR_SRC_RX_FIFO1_NEW_MSG, UTILS_MCAN_RX_EVENT
*
* Return Value : NA
*
*******************************************************************************/
void mcanRxISR(void )
{
uint32_t intrStatus;
intrStatus = MCAN_getIntrStatus(MCAN_MODULE);
MCAN_clearIntrStatus(MCAN_MODULE, intrStatus);
gCntrForIsr++;
if (MCAN_INTR_SRC_DEDICATED_RX_BUFF_MSG ==
(intrStatus & MCAN_INTR_SRC_DEDICATED_RX_BUFF_MSG))
{
resetRxIsrFlag();//gMcanRxIsrFlag = 0U;
Event_post(mcanRxEvent,UTILS_MCAN_RX_EVENT);
rxMsgFlag = TRUE;
}
else if (MCAN_INTR_SRC_RX_FIFO1_NEW_MSG
== (intrStatus & MCAN_INTR_SRC_RX_FIFO1_NEW_MSG))
{
++can_isr_rx_counter;
if (1501 > can_isr_rx_counter)
{
time_delta_ISR[can_isr_rx_counter] = Utils_getCurGlobalTimeInUsec();
}
resetRxIsrFlagFifoFlag(0U);
Event_post(mcanRxEvent,UTILS_MCAN_RX_EVENT);
rxMsgFlag = TRUE;
}
else if (MCAN_INTR_SRC_RX_FIFO0_NEW_MSG
== (intrStatus & MCAN_INTR_SRC_RX_FIFO0_NEW_MSG))
{
resetRxIsrFlagFifoFlag(1U);
Event_post(mcanRxEvent,UTILS_MCAN_RX_EVENT);
rxMsgFlag = TRUE;
}
else if(MCAN_INTR_SRC_RX_FIFO1_MSG_LOST == (intrStatus & MCAN_INTR_SRC_RX_FIFO1_MSG_LOST))
{
Vps_printf(" UTILS: MCAN Rx (RX_FIFO1_MSG_LOST)Interrupt Status: %x !!!\n", intrStatus);
}
else if(MCAN_INTR_SRC_RX_FIFO1_FULL == (intrStatus & MCAN_INTR_SRC_RX_FIFO1_FULL))
{
resetRxIsrFlagFifoFlag(0U);
Event_post(mcanRxEvent,UTILS_MCAN_RX_EVENT);
rxMsgFlag = TRUE;
Vps_printf(" UTILS: MCAN Rx (RX_FIFO1_FULL)Interrupt Status: %x !!!\n", intrStatus);
}
else if(MCAN_INTR_SRC_RX_FIFO0_MSG_LOST == (intrStatus & MCAN_INTR_SRC_RX_FIFO0_MSG_LOST))
{
Vps_printf(" UTILS: MCAN Rx (RX_FIFO0_MSG_LOST)Interrupt Status: %x !!!\n", intrStatus);
}
else if(MCAN_INTR_SRC_RX_FIFO0_FULL == (intrStatus & MCAN_INTR_SRC_RX_FIFO0_FULL))
{
resetRxIsrFlagFifoFlag(1U);
Event_post(mcanRxEvent,UTILS_MCAN_RX_EVENT);
rxMsgFlag = TRUE;
Vps_printf(" UTILS: MCAN Rx (RX_FIFO0_FULL)Interrupt Status: %x !!!\n", intrStatus);
}
else if (MCAN_INTR_SRC_BUS_OFF_STATUS
== (intrStatus & MCAN_INTR_SRC_BUS_OFF_STATUS))
{
Vps_printf(" UTILS: MCAN Rx (BUS OFF Error Occurred)Interrupt Status: %x !!!\n", intrStatus);
}
else
{
Vps_printf(" UTILS: MCAN Rx Interrupt Status: %x !!!\n", intrStatus);
}
}
#else
/*******************************************************************************
* Function Name : mcanRxISR
*
* Service Id : NA
*
* Description : Receive ISR for the MCAN
*
* PreConditions :
*
* Parameters : NA
*
* Called functions : MCAN_getIntrStatus, MCAN_clearIntrStatus,
* resetRxIsrFlag,
*
*
* Global Data : MCAN_MODULE, MCAN_INTR_SRC_DEDICATED_RX_BUFF_MSG,
* UTILS_MCAN_RX_EVENT
*
* Return Value : NA
*
*******************************************************************************/
void mcanRxISR(void)
{
uint32_t intrStatus;
intrStatus = MCAN_getIntrStatus(MCAN_MODULE);
MCAN_clearIntrStatus(MCAN_MODULE, intrStatus);
if (MCAN_INTR_SRC_DEDICATED_RX_BUFF_MSG ==
(intrStatus & MCAN_INTR_SRC_DEDICATED_RX_BUFF_MSG))
{
resetRxIsrFlag();//gMcanRxIsrFlag = 0U;
}
else
{
Vps_printf(" UTILS: MCAN Rx Interrupt Status: %x !!!\n", intrStatus);
}
}
#endif
/*******************************************************************************
* Function Name : mcanECCISR
*
* Service Id : NA
*
* Description : ECC ISR for the MCAN
*
* PreConditions :
*
* Parameters : NA
*
* Called functions : MCAN_eccGetErrorStatus, MCAN_eccClearErrorStatus,
* MCAN_eccWriteEOI,
*
*
* Global Data : MCAN_MODULE, MCAN_ECC_ERR_TYPE_SEC,
* MCAN_ECC_ERR_TYPE_DED
*
* Return Value : NA
*
*******************************************************************************/
void mcanECCISR(void)
{
MCAN_eccGetErrorStatus(MCAN_MODULE, &gMcaneccErr);
if (1U == gMcaneccErr.secErr)
{
MCAN_eccClearErrorStatus(MCAN_MODULE, MCAN_ECC_ERR_TYPE_SEC);
MCAN_eccWriteEOI(MCAN_MODULE, MCAN_ECC_ERR_TYPE_SEC);
}
if (1U == gMcaneccErr.dedErr)
{
MCAN_eccClearErrorStatus(MCAN_MODULE, MCAN_ECC_ERR_TYPE_DED);
MCAN_eccWriteEOI(MCAN_MODULE, MCAN_ECC_ERR_TYPE_DED);
}
}
/*******************************************************************************
* Function Name : mcanTSISR
*
* Service Id : NA
*
* Description : TS ISR for the MCAN
*
* PreConditions :
*
* Parameters : NA
*
* Called functions :
*
* Global Data :
*
* Return Value : NA
*
*******************************************************************************/
void mcanTSISR(void )
{
Vps_printf(" UTILS: MCAN Time Stamp overflow happened !!!\n");
}
/*******************************************************************************
* Function Name : Utils_mcanXBarConfig
*
* Service Id : NA
*
* Description : ISR registration API
*
* PreConditions :
*
* Parameters : NA
*
* Called functions : IntXbar_connectIRQ, BspOsal_registerIntr,
* Hwi_enableInterrupt, Hwi_restore
*
* Global Data :
*
* Return Value : Status of ISR registration
*
*******************************************************************************/
int32_t Utils_mcanXBarConfig(void)
{
Int32 configStatus = STW_SOK;
UInt32 cookie = 0;
//IntXbar_connectIRQ(MCAN_INT_TX_M4, MCAN_IRQ_INT0);
//IntXbar_connectIRQ(MCAN_INT_RX_M4, MCAN_IRQ_INT1);
//IntXbar_connectIRQ(MCAN_ECC_INT, MCAN_IRQ_ECC);
//IntXbar_connectIRQ(MCAN_TS_INT, MCAN_IRQ_TS);
CSL_xbarIrqConfigure(XBAR_CPU, XBAR_MCAN_INT0, XBAR_INTR0_SOURCE);
CSL_xbarIrqConfigure(XBAR_CPU, CSL_XBAR_MCAN_IRQ_INT1, XBAR_INTR1_SOURCE);
CSL_xbarIrqConfigure(XBAR_CPU, XBAR_MCAN_INT0, XBAR_INTR0_SOURCE);
CSL_xbarIrqConfigure(XBAR_CPU, XBAR_MCAN_INT0, XBAR_INTR0_SOURCE);
/* Disabling the global interrupts */
cookie = Hwi_disable();
BspOsal_IntrHandle hndlIntr0 = NULL;
BspOsal_IntrHandle hndlIntr1 = NULL;
BspOsal_IntrHandle hndlIntrECC = NULL;
BspOsal_IntrHandle hndlIntrTS = NULL;
hndlIntr0 = BspOsal_registerIntr(MCAN_INT_TX_M4,
(BspOsal_IntrFuncPtr)mcanTxISR,
0U
);
hndlIntr1 = BspOsal_registerIntr(MCAN_INT_RX_M4,
(BspOsal_IntrFuncPtr)mcanRxISR,
0U
);
hndlIntrECC = BspOsal_registerIntr(MCAN_ECC_INT,
(BspOsal_IntrFuncPtr)mcanECCISR,
0U
);
hndlIntrTS = BspOsal_registerIntr(MCAN_TS_INT,
(BspOsal_IntrFuncPtr)mcanTSISR,
0U
);
if( (hndlIntr0 == NULL) || (hndlIntr1 == NULL) || (hndlIntrECC == NULL) || (hndlIntrTS == NULL))
{
Vps_printf(" UTILS: MCAN INTERRUPT: BspOsal_registerIntr Failed !!!\n");
UTILS_assert(0);
}
/* Enable the interrupt */
Hwi_enableInterrupt(MCAN_INT_TX_M4);
Hwi_enableInterrupt(MCAN_INT_RX_M4);
Hwi_enableInterrupt(MCAN_ECC_INT);
Hwi_enableInterrupt(MCAN_TS_INT );
/* Restore interrupts */
Hwi_restore(cookie);
return configStatus;
}
/*******************************************************************************
* Function Name : Utils_initTxStructure
*
* Service Id : NA
*
* Description : Init the Transmitmessage structure
*
* PreConditions :
*
* Parameters : NA
*
* Called functions :
*
* Global Data :
*
* Return Value : NA
*
*******************************************************************************/
void Utils_initTxStructure()
{
/* Initialize message to transmit */
transmitMsg.id = 0x0;//(uint32_t)((uint32_t)(0x4U) << 18U);
transmitMsg.rtr = 0U;
transmitMsg.xtd = 0U;
transmitMsg.esi = 0U;
transmitMsg.dlc = 0U;
transmitMsg.brs = 1U;
transmitMsg.fdf = 0U;
transmitMsg.efc = 1U;
transmitMsg.mm = 0xAAU;
}
/*******************************************************************************
* Function Name : Utils_mcanInit
*
* Service Id : NA
*
* Description : Init the MCAN with received params
*
* PreConditions :
*
* Parameters : NA
*
* Called functions : Utils_initTxStructure, initAndConfigMCANParams,
* configureMCANModule, Utils_mcanXBarConfig,
* enableMcanModule, initAndConfigMCAN, enableInterrupts,
* selectRxIntrLine, Event_Params_init, Event_construct,
* Event_handle, Utils_queCreate
*
* Global Data :
*
* Return Value : Status of init
*
*******************************************************************************/
Int32 Utils_mcanInit( mcanInitParams* initParams,
mcanMsgRAMConfigParams* configRamParams,
mcanFilterConfig* filterParams,
mcanStdMsgIDFilterElement *stdIdFilter,
mcanExtMsgIDFilterElement *extIdFilter
)
{
Int32 status = STW_EFAIL;
Utils_initTxStructure();
//PlatformUnlockMMR();
initAndConfigMCANParams(initParams, configRamParams, filterParams, stdIdFilter, extIdFilter);
status = configureMCANModule();
if (STW_SOK == status)
{
if (0 == xBarOnlyOnce)
{
status = Utils_mcanXBarConfig();
xBarOnlyOnce = 1;
}
enableMcanModule();
if (STW_SOK == status)
{
status = initAndConfigMCAN(&gMcan_initParams, &gMcan_msgRAMConfigParams, &gMcan_stdFiltelem, &gMcan_globalFilterConfig, &gMcan_extIdFiltelem);
if (STW_EFAIL == status)
{
Vps_printf(" UTILS: MCAN initAndConfigMCAN failed !!!\n");
}
/* enable the interrupts */
enableInterrupts();
/* Select the receive interrupt line */
/* by default receive intr line is selected, required intr line will be selected based on the flagStatus of tx and rx isr's*/
selectRxIntrLine();
txIsrFlagStatus = 0U;
rxIsrFlagStatus = 1U;
}
else
{
Vps_printf(" UTILS: MCAN configureMCANModule failed !!!\n");
UTILS_assert(0);
}
}
else
{
Vps_printf(" UTILS: MCAN Utils_mcanXBarConfig failed !!!\n");
UTILS_assert(0);
}
#ifdef EVENT_RX
Event_Params eventParams;
Event_Params_init(&eventParams);
Event_construct(&mcanRxEventMem, &eventParams);
mcanRxEvent = Event_handle(&mcanRxEventMem);
Event_Params eventParamsQ;
Event_Params_init(&eventParamsQ);
Event_construct(&mcanRxQueueEventMem, &eventParamsQ);
mcanRxQueueEvent = Event_handle(&mcanRxQueueEventMem);
#endif
//rxQueue = ((MCAN_RxBufElement)*)malloc(sizeof(MCAN_RxBufElement) * MAX_QUEUE_SIZE);
Utils_queCreate(&rxMsgQueueHandle,
MAX_QUEUE_SIZE,
&rxQueue[0],
UTILS_QUE_FLAG_NO_BLOCK_QUE);
return status;
}
/*******************************************************************************
* Function Name : Utils_mcanTransmitMsg
*
* Service Id : NA
*
* Description : Transmit message
*
* PreConditions :
*
* Parameters : NA
*
* Called functions : selectTxIntrLine, transmitMsgOverMCAN, selectRxIntrLine
*
* Global Data :
*
* Return Value : Status of transmission of message
*
*******************************************************************************/
Int32 Utils_mcanTransmitMsg(mcanMsg_t *txMsg)
{
if(can_isr_tx_success_counter != 0U
&& 0U == (can_isr_tx_success_counter % 100U))
{
#ifdef DEBUG_UTILS_MCAN
Vps_printf("can_isr_tx_success_counter=%llu, can_isr_rx_counter=%llu, can_recv_read_success=%llu",
can_isr_tx_success_counter, can_isr_rx_counter, can_recv_read_success);
#endif
}
if(txIsrFlagStatus == 0U)
{
/* Select the Tx interrupt line */
selectTxIntrLine();
txIsrFlagStatus = 1U;
rxIsrFlagStatus = 0U;
}
Int32 status = STW_EFAIL;
UInt32 dataIdx = 0U;
if(1 == txMsg->idType) // for extended 29 bit id
{
transmitMsg.id = txMsg->msgId;
transmitMsg.xtd = 1U;
}
else // for standard 11 bit id
{
transmitMsg.id = (txMsg->msgId << (STD_ID_SHIFT));
transmitMsg.xtd = 0U;
}
if(0 == txMsg->frameType) // for Classic CAN frame
{
transmitMsg.fdf = txMsg->frameType;
if(txMsg->dataLengthCount > 8U)
{
transmitMsg.dlc = 8U;
}
else
{
transmitMsg.dlc = txMsg->dataLengthCount;
}
}
else // for CAN-FD frame
{
transmitMsg.fdf = MCAN_FD_FRAME;
transmitMsg.dlc = txMsg->dataLengthCount;
}
/* copy data into tx message */
for(dataIdx = 0; dataIdx < transmitMsg.dlc; dataIdx++)
{
transmitMsg.data[dataIdx] = txMsg->dataBuffer[dataIdx];
}
if(rxMsgFlag == TRUE)
{
status = transmitMsgOverMCAN(&transmitMsg);
}
status = STW_SOK;
if(STW_EFAIL == status)
{
Vps_printf(" UTILS: Utils_mcanTransmitMsg failed !!!\n");
UTILS_assert(0);
}
if (rxIsrFlagStatus == 0U)
{
/* Select the Rx interrupt line */
selectRxIntrLine();
rxIsrFlagStatus = 1U;
txIsrFlagStatus = 0U;
}
return status;
}
/*******************************************************************************
* Function Name : Utils_mcanReceiveMsg
*
* Service Id : NA
*
* Description : Receive message
*
* PreConditions :
*
* Parameters : NA
*
* Called functions : selectRxIntrLine, Event_pend, getIsrCntr,
* receiveMsgOverMCAN, Utils_queIsFull, Utils_quePut,
* Event_post
*
* Global Data :
*
* Return Value : Status of receiving message
*
*******************************************************************************/
Int32 Utils_mcanReceiveMsg(mcanMsg_t *rxMsg)
{
if (rxIsrFlagStatus == 0U)
{
/* Select the Rx interrupt line */
selectRxIntrLine();
rxIsrFlagStatus = 1U;
txIsrFlagStatus = 0U;
}
Int32 status = STW_EFAIL;
#ifdef EVENT_RX
UInt32 msgId;
UInt postedEvents;
UInt32 eventMask = 0;
eventMask |= UTILS_MCAN_RX_EXIT_EVENT;
eventMask |= UTILS_MCAN_RX_EVENT;
Bool exitLoop = FALSE;
Int32 loopCntr = 0;
Int32 lpCntr = 0;
Int32 qStatus = 0;
Int32 index = 0;
Bool qFull = FALSE;
#endif
do
{
postedEvents = Event_pend(mcanRxEvent,0,eventMask,
BSP_OSAL_WAIT_FOREVER);
getIsrCntr(&loopCntr);
for(lpCntr = 0; lpCntr < loopCntr; lpCntr++)
{
index = rxMsgQueueHandle.curWr;
gCntrForData++;
if (postedEvents & UTILS_MCAN_RX_EXIT_EVENT)
//if(200 == gCntrForData)
{
exitLoop = TRUE;
}
else
{
//status = receiveMsgOverMCAN(&receiveMsg);
MCAN_ErrCntStatus errCounter;
memset(&errCounter, 0, sizeof(errCounter));
status = receiveMsgOverMCAN(&rxdata[index], &errCounter);
//rxdata
if(0 == rxdata[index].xtd)
{
msgId = (((rxdata[index].id)>>1)&0x7FF);
rxdata[index].id = msgId;
}
//Vps_printf( "Message ID: 0x%x ", rxdata[index].id);
//Vps_printf( "Data : 0x%x", rxdata[index].data[0]);
if(STW_EFAIL == status)
{
Vps_printf("UTILS: rx failed !!!\n");
Vps_printf("WARNING: CAN Rx error counter reached");
Vps_printf(
"MCAN_ErrCntStatus: transErrLogCnt=%u, recErrCnt=%u, rpStatus=%u, canErrLogCnt=%u",
errCounter.transErrLogCnt, errCounter.recErrCnt, errCounter.rpStatus, errCounter.canErrLogCnt);
}
else
{
++can_recv_read_success;
if (1501 > can_recv_read_success)
{
time_delta_ReceiveRead[can_recv_read_success] = Utils_getCurGlobalTimeInUsec();
}
if((1501 == can_isr_rx_counter)&&(1501 == can_recv_read_success))
{
UInt64 i = 0U;
for(i = 0; i < 1501; ++i)
{
Vps_printf("RX ISR: i: %llu, time_delta_ISR: %llu , time_delta_ReceiveRead: %llu", i, time_delta_ISR[i],time_delta_ReceiveRead[i]);
BspOsal_sleep(1U);
}
}
qFull = (Bool)Utils_queIsFull(&rxMsgQueueHandle);
if(qFull == FALSE)
{
qStatus = Utils_quePut(&rxMsgQueueHandle,&rxdata[index],BIOS_NO_WAIT);
UTILS_assert(qStatus == 0);
Event_post(mcanRxQueueEvent,UTILS_MCAN_RX_QUEUE_EVENT);
index++;
if(index >= MAX_QUEUE_SIZE)
{
index = 0U;
}
}
else
{
Vps_printf(" UTILS: Queue Full !!!\n");
}
}
}
}
}while(exitLoop!= TRUE);
//Vps_printf("gCntrForData = %d", gCntrForData);
// Vps_printf("gCntrForIsr = %d", gCntrForIsr);
return status;
}
/*******************************************************************************
* Function Name : initAndConfigMCANParams
*
* Service Id : NA
*
* Description : Init and Configure MCAN parameters
*
* PreConditions :
*
* Parameters : NA
*
* Called functions : selectRxIntrLine, Event_pend, getIsrCntr,
* receiveMsgOverMCAN, Utils_queIsFull, Utils_quePut,
* Event_post
*
* Global Data : gMcan_initParams, gMcan_msgRAMConfigParams,
* gMcan_globalFilterConfig, gMcan_stdFiltelem,
* gMcan_extIdFiltelem
*
* Return Value : Status of init and configuration of MCAN parameters
*
*******************************************************************************/
void initAndConfigMCANParams( mcanInitParams* initParams,
mcanMsgRAMConfigParams* configRamParams,
mcanFilterConfig* globalfilterParams,
mcanStdMsgIDFilterElement *stdIdFilter,
mcanExtMsgIDFilterElement *extIdFilter
)
{
if(initParams != NULL)
{
gMcan_initParams.fdMode = initParams->fdMode;
gMcan_initParams.brsEnable = initParams->brsEnable;
gMcan_initParams.txpEnable = initParams->txpEnable;
gMcan_initParams.efbi = initParams->efbi;
gMcan_initParams.pxhddisable = initParams->pxhddisable;
gMcan_initParams.darEnable = initParams->darEnable;
gMcan_initParams.wkupReqEnable = initParams->wkupReqEnable;
gMcan_initParams.autoWkupEnable = initParams->autoWkupEnable;
gMcan_initParams.emulationEnable = initParams->emulationEnable;
gMcan_initParams.emulationFAck = initParams->emulationFAck;
gMcan_initParams.clkStopFAck = initParams->clkStopFAck;
gMcan_initParams.wdcPreload = initParams->wdcPreload;
gMcan_initParams.tdcEnable = initParams->tdcEnable;
gMcan_initParams.tdcConfig.tdcf = initParams->tdcf;
gMcan_initParams.tdcConfig.tdco = initParams->tdco;
}
else
{
gMcan_initParams.fdMode = 0x0U;
gMcan_initParams.brsEnable = 0x0U;
gMcan_initParams.txpEnable = 0x0U;
gMcan_initParams.efbi = 0x0U;
gMcan_initParams.pxhddisable = 0x0U;
gMcan_initParams.darEnable = 0x0U;
gMcan_initParams.wkupReqEnable = 0x1U;
gMcan_initParams.autoWkupEnable = 0x1U;
gMcan_initParams.emulationEnable = 0x1U;
gMcan_initParams.emulationFAck = 0x0U;
gMcan_initParams.clkStopFAck = 0x0U;
gMcan_initParams.wdcPreload = 0xFFU;
gMcan_initParams.tdcEnable = 0x1U;
gMcan_initParams.tdcConfig.tdcf = 0xAU;
gMcan_initParams.tdcConfig.tdco = 0x6U;
}
gMcan_msgRAMConfigParams.flssa = MCAN_STD_ID_FILT_START_ADDR;
gMcan_msgRAMConfigParams.flesa = MCAN_EXT_ID_FILT_START_ADDR;
gMcan_msgRAMConfigParams.txStartAddr = MCAN_TX_BUFF_START_ADDR;
gMcan_msgRAMConfigParams.txEventFIFOStartAddr = MCAN_TX_EVENT_START_ADDR;
gMcan_msgRAMConfigParams.rxFIFO0startAddr = MCAN_FIFO_0_START_ADDR;
gMcan_msgRAMConfigParams.rxFIFO1startAddr = MCAN_FIFO_1_START_ADDR;
gMcan_msgRAMConfigParams.rxBufStartAddr = MCAN_RX_BUFF_START_ADDR;
gMcan_msgRAMConfigParams.rxBufElemSize = MCAN_ELEM_SIZE_64BYTES;
gMcan_msgRAMConfigParams.rxFIFO0ElemSize = MCAN_ELEM_SIZE_64BYTES;
gMcan_msgRAMConfigParams.rxFIFO1ElemSize = MCAN_ELEM_SIZE_64BYTES;
if (configRamParams != NULL)
{
gMcan_msgRAMConfigParams.lss = configRamParams->lss;
gMcan_msgRAMConfigParams.lse = configRamParams->lse;
gMcan_msgRAMConfigParams.txBufNum = configRamParams->txBufNum;
gMcan_msgRAMConfigParams.txFIFOSize = configRamParams->txFIFOSize;
gMcan_msgRAMConfigParams.txBufMode = configRamParams->txBufMode;
gMcan_msgRAMConfigParams.txBufElemSize = configRamParams->txBufElemSize;
gMcan_msgRAMConfigParams.txEventFIFOSize = configRamParams->txEventFIFOSize;
gMcan_msgRAMConfigParams.txEventFIFOWaterMark = configRamParams->txEventFIFOWaterMark;
gMcan_msgRAMConfigParams.rxFIFO0size = configRamParams->rxFIFO0size;
gMcan_msgRAMConfigParams.rxFIFO0waterMark = configRamParams->rxFIFO0waterMark;
gMcan_msgRAMConfigParams.rxFIFO0OpMode = configRamParams->rxFIFO0OpMode;
gMcan_msgRAMConfigParams.rxFIFO1size = configRamParams->rxFIFO1size;
gMcan_msgRAMConfigParams.rxFIFO1waterMark = configRamParams->rxFIFO1waterMark;
gMcan_msgRAMConfigParams.rxFIFO1OpMode = configRamParams->rxFIFO1OpMode;
}
else
{
gMcan_msgRAMConfigParams.lss = MCAN_STD_ID_FILTER_NUM;
gMcan_msgRAMConfigParams.lse = MCAN_EXT_ID_FILTER_NUM;
gMcan_msgRAMConfigParams.txBufNum = MCAN_TX_BUFF_SIZE;
gMcan_msgRAMConfigParams.txFIFOSize = MCAN_TX_FIFO_SIZE;
gMcan_msgRAMConfigParams.txBufMode = MCAN_TX_BUFF_MODE;
gMcan_msgRAMConfigParams.txBufElemSize = MCAN_ELEM_SIZE_64BYTES;
gMcan_msgRAMConfigParams.txEventFIFOSize = MCAN_TX_BUFF_SIZE;
gMcan_msgRAMConfigParams.txEventFIFOWaterMark = MCAN_TX_EVENT_FIFO_WATERMARK;
gMcan_msgRAMConfigParams.rxFIFO0size = MCAN_FIFO_0_NUM;
gMcan_msgRAMConfigParams.rxFIFO0waterMark = MCAN_RX_FIFO_0_WATERMARK;
gMcan_msgRAMConfigParams.rxFIFO0OpMode = 0x1;
gMcan_msgRAMConfigParams.rxFIFO1size = MCAN_FIFO_1_NUM;
gMcan_msgRAMConfigParams.rxFIFO1waterMark = MCAN_RX_FIFO_1_WATERMARK;
gMcan_msgRAMConfigParams.rxFIFO1OpMode = 0x1;
}
if(NULL != globalfilterParams)
{
gMcan_globalFilterConfig.rrfe = globalfilterParams->rrfe;
gMcan_globalFilterConfig.rrfs = globalfilterParams->rrfs;
gMcan_globalFilterConfig.anfe = globalfilterParams->anfe;
gMcan_globalFilterConfig.anfs = globalfilterParams->anfs;
}
else
{
gMcan_globalFilterConfig.rrfe = 0x1U;
gMcan_globalFilterConfig.rrfs = 0x1U;
gMcan_globalFilterConfig.anfe = 0x3U;
gMcan_globalFilterConfig.anfs = 0x3U;
}
if(NULL != stdIdFilter)
{
gMcan_stdFiltelem.sfid2 = stdIdFilter->sfid2;
gMcan_stdFiltelem.sfid1 = stdIdFilter->sfid1;
gMcan_stdFiltelem.sfec = stdIdFilter->sfec;
gMcan_stdFiltelem.sft = stdIdFilter->sft;
}
else
{
/* id 0x65 and 0x6C is set by default for filtering */
gMcan_stdFiltelem.sfid2 = 0x760U;
gMcan_stdFiltelem.sfid1 = 0x65U;
gMcan_stdFiltelem.sfec = 0x2U;
gMcan_stdFiltelem.sft = 0x2U;
}
if(NULL != extIdFilter)
{
gMcan_extIdFiltelem.efid1 = extIdFilter->efid1;
gMcan_extIdFiltelem.efid2 = extIdFilter->efid2;
gMcan_extIdFiltelem.efec = extIdFilter->efec;
gMcan_extIdFiltelem.eft = extIdFilter->eft;
}
else
{
/* id 02 is set by default for filtering */
gMcan_extIdFiltelem.efid1 = 0x1FFFFF60U;
gMcan_extIdFiltelem.efid2 = 0x65U;
gMcan_extIdFiltelem.efec = 0x2U;
gMcan_extIdFiltelem.eft = 0x2U;
}
}
/*******************************************************************************
* Function Name : getRxEventHandle
*
* Service Id : NA
*
* Description : Get the Rx event handle
*
* PreConditions :
*
* Parameters : NA
*
* Called functions :
*
* Global Data : mcanRxQueueEvent
*
* Return Value : MCAN Rx event Handle address
*
*******************************************************************************/
Event_Handle* getRxEventHandle()
{
return &mcanRxQueueEvent;
}
/*******************************************************************************
* Function Name : getMsgQueueHandle
*
* Service Id : NA
*
* Description : Get the Message Queue handle
*
* PreConditions :
*
* Parameters : NA
*
* Called functions :
*
* Global Data : rxMsgQueueHandle
*
* Return Value : MCAN Rx Message Queue Handle address
*
*******************************************************************************/
Utils_QueHandle* getMsgQueueHandle()
{
return &rxMsgQueueHandle;
}
/*******************************************************************************
* Function Name : Utils_mcanDeInit
*
* Service Id : NA
*
* Description : de-init of MCAN
*
* PreConditions :
*
* Parameters : NA
*
* Called functions : Event_post
*
* Global Data : mcanRxEvent, mcanRxQueueEvent
*
* Return Value : NA
*
*******************************************************************************/
void Utils_mcanDeInit()
{
Event_post(mcanRxEvent,UTILS_MCAN_RX_EXIT_EVENT);
Event_post(mcanRxQueueEvent,UTILS_MCAN_RX_QUEUE_EXIT_EVENT);
}
Regards,
Bikash
Hi Rishabh,
The exception issue is resolved.
It was causing due to some mismatch in MCAN address.
However I can see Can is initialized and we are getting acknowledgement for any RX message we are transmitting through the Canalyzer.
But we are not getting any interrupt for Rx as well as Tx.
I can see interrupt Enable register are set,
I suspect it may be due to Cross bar mapping.
I have attached the source files please have a look and let me know if the mapping is correct.
/*******************************************************************************
* Company : HARMAN
*
* File Name : harman_module_mcan_proto_A.c
*
* Version : 01.00.00
*
* Date : 11-June-2018
*
* Operating Environment : TDA2Px
*
* Compiler with Version Number : ti-cgt-arm_16.9.2.LTS
*
* Description : API's for MCAN internally using MCAN drivers
*
* Created by : HARMAN
*
* Copyright (C) 2018 by HARMAN
* All rights reserved.
* This code contains information that is proprietary to HARMAN
* No part of this code may be reproduced or used in whole or part in any form
* or by any means - graphic, electronic or mechanical without the written
* permission of HARMAN
*******************************************************************************/
/*******************************************************************************
** Revision History **
*******************************************************************************/
/*
* V01.00.00: 11-Jun-2018 : Initial Version
*/
/******************************************************************************/
/*==============================================================================
Following are the MISRA C Violations
=============================================================================*/
/*
*/
/*==============================================================================
** Include Section **
==============================================================================*/
#include "harman_module_mcan_proto_A.h"
/*******************************************************************************
* Defines / Globals
*******************************************************************************
*/
volatile uint32_t gMcanTxIsrFlag = 1U;
volatile uint32_t gMcanRxIsrFlag = 1U;
volatile int32_t gRxFifoMsgCntr = 0;
volatile int32_t gRxFifo0MsgCntr = 0;
volatile int32_t gRxBuffCntr = 0;
volatile int32_t gIsrCounter = 0;
MCAN_ConfigParams configParams;
MCAN_BitTimingParams bitTimes;
MCAN_RxFIFOStatus rxFIFO1status;
MCAN_RxFIFOStatus rxFIFO0status;
/*==============================================================================
** Function Definitions **
==============================================================================*/
/*******************************************************************************
* Function Name : enableMcanModule
*
* Service Id : NA
*
* Description : MCAN module enable API
*
* PreConditions :
*
* Parameters :
*
* Called functions :
*
* Global Data :
*
* Return Value : NA
*
*******************************************************************************/
void enableMcanModule()
{
/* Enable MCAN module */
HW_WR_FIELD32(SOC_L4PER_CM_CORE_BASE+CM_L4PER2_DCAN2_CLKCTRL,
CM_L4PER2_DCAN2_CLKCTRL_MODULEMODE,
CM_L4PER2_DCAN2_CLKCTRL_MODULEMODE_ENABLE);
while (CM_L4PER2_DCAN2_CLKCTRL_IDLEST_FUNC !=
HW_RD_FIELD32(SOC_L4PER_CM_CORE_BASE+CM_L4PER2_DCAN2_CLKCTRL,
CM_L4PER2_DCAN2_CLKCTRL_IDLEST))
{
/* Wait till MCAN module is enabled */
}
}
/*******************************************************************************
* Function Name : configureMCANModule
*
* Service Id : NA
*
* Description : This API will configure MCAN module.
*
* PreConditions : This API is only to be called once before init of MCAN.
*
* Parameters :
*
* Called functions :
*
* Global Data :
*
* Return Value : status of configuring MCAN module
*
*******************************************************************************/
int32_t configureMCANModule(void)
{
int32_t status = STW_SOK;
uint32_t postDivider;
padConfigPrcmEnable();
postDivider = 24U;
/* Set the postDividers reg */
HW_WR_FIELD32(SOC_CTRL_MODULE_CORE_CORE_REGISTERS_BASE+CTRL_CORE_SMA_SW_0,
CTRL_CORE_SMA_SW_0_MCAN_CLK_HSDIV,
postDivider);
/* Select the mux value */
HW_WR_FIELD32(SOC_CTRL_MODULE_CORE_CORE_REGISTERS_BASE+CTRL_CORE_SMA_SW_0,
CTRL_CORE_SMA_SW_0_MCAN_CLK_TENABLEDIV,
1U);
/* Select the Toggle sequence 010 */
HW_WR_FIELD32(SOC_CTRL_MODULE_CORE_CORE_REGISTERS_BASE+CTRL_CORE_SMA_SW_0,
CTRL_CORE_SMA_SW_0_MCAN_CLK_HSDIV_LATCH_EN,
0U);
HW_WR_FIELD32(SOC_CTRL_MODULE_CORE_CORE_REGISTERS_BASE+CTRL_CORE_SMA_SW_0,
CTRL_CORE_SMA_SW_0_MCAN_CLK_HSDIV_LATCH_EN,
1U);
HW_WR_FIELD32(SOC_CTRL_MODULE_CORE_CORE_REGISTERS_BASE+CTRL_CORE_SMA_SW_0,
CTRL_CORE_SMA_SW_0_MCAN_CLK_HSDIV_LATCH_EN,
0U);
/* Enable the HSDIV post div clock */
HW_WR_FIELD32(SOC_CTRL_MODULE_CORE_CORE_REGISTERS_BASE+CTRL_CORE_SMA_SW_0,
CTRL_CORE_SMA_SW_0_MCAN_CLK_HSDIV_EN,
1U);
return status;
}
/*******************************************************************************
* Function Name : transmitMsgOverMCAN
*
* Service Id : NA
*
* Description : This API will transmit the message.
*
* PreConditions :
*
* Parameters : txMsg - refer structure MCAN_TxBufElement.
*
* Called functions : MCAN_txBufTransIntrEnable, MCAN_writeMsgRam,
* MCAN_getProtocolStatus
*
* Global Data :
*
* Return Value : status of transmit CAN message
*
*******************************************************************************/
int32_t transmitMsgOverMCAN(MCAN_TxBufElement *txMsg )
{
int32_t status = STW_EFAIL, protocolStatus = STW_SOK;
uint32_t txBufNum;
uint32_t txBufStatus;
MCAN_ProtocolStatus protStatus;
//MCAN_TxFIFOStatus txFIFOStatus;
#ifdef TX_FIFO_ENABLE
MCAN_getTxFIFOQueStatus(MCAN_MODULE, &txFIFOStatus);
txBufNum = txFIFOStatus.putIdx;
/* Enable Transmission interrupt */
status = MCAN_txBufTransIntrEnable(MCAN_MODULE,
txBufNum,
(uint32_t)TRUE);
/* write the message into MessageRAM for transmission */
MCAN_writeMsgRam(MCAN_MODULE,
MCAN_MEM_TYPE_FIFO,
txBufNum,
txMsg);
#else
txBufStatus = MCAN_getTxBufReqPend(MCAN_MODULE);
for(txBufNum = 0; txBufNum < MCAN_TX_BUFF_SIZE ; txBufNum++ )
{
if(MCAN_TX_BUFF_TRASMISSION_REQUEST_PENDING != ((txBufStatus >> txBufNum) & (MCAN_TX_BUFF_TRASMISSION_REQUEST_PENDING)))
{
break;
}
}
/* Enable Transmission interrupt */
status = MCAN_txBufTransIntrEnable(MCAN_MODULE,
txBufNum,
(uint32_t)TRUE);
/* write the message into MessageRAM for transmission */
MCAN_writeMsgRam(MCAN_MODULE,
MCAN_MEM_TYPE_BUF,
txBufNum,
txMsg);
#endif
/* Add request for transmission */
status += MCAN_txBufAddReq(MCAN_MODULE, txBufNum);
if (STW_SOK != status)
{
status = STW_EFAIL;
}
/* wait untill transmit complete occurs */
while (gMcanTxIsrFlag)
{}
gMcanTxIsrFlag = 1U;
/* check for errors */
MCAN_getProtocolStatus(MCAN_MODULE, &protStatus);
/* Checking for Errors */
if (((MCAN_ERR_CODE_NO_ERROR == protStatus.lastErrCode) ||
(MCAN_ERR_CODE_NO_CHANGE == protStatus.lastErrCode)) &&
((MCAN_ERR_CODE_NO_ERROR == protStatus.dlec) ||
(MCAN_ERR_CODE_NO_CHANGE == protStatus.dlec)) &&
(0U == protStatus.pxe))
{
protocolStatus = STW_SOK;// no errors;
}
else
{
protocolStatus = STW_EFAIL;
}
if(STW_EFAIL == protocolStatus)
{
status = protocolStatus;
}
return status;
}
/*******************************************************************************
* Function Name : enableInterrupts
*
* Service Id : NA
*
* Description : This API will enable the interrupt for MCAN
*
* PreConditions :
*
* Parameters :
*
* Called functions : MCAN_enableIntr
*
* Global Data :
*
* Return Value : NA
*
*******************************************************************************/
void enableInterrupts()
{
/* Enable Interrupts */
// MCAN_enableIntr(MCAN_MODULE, MCAN_INTR_MASK_ALL, (uint32_t)TRUE);
MCAN_enableIntr(MCAN_MODULE, MCAN_INTR_MASK_TXRX, (uint32_t)TRUE);
MCAN_enableIntr(MCAN_MODULE,
MCAN_INTR_SRC_RES_ADDR_ACCESS, (uint32_t)FALSE);
}
/*******************************************************************************
* Function Name : selectTxIntrLine
*
* Service Id : NA
*
* Description : This API will select the interrupt line for Tx
*
* PreConditions : enableInterrupts should be called at least once before this API call
*
* Parameters :
*
* Called functions : MCAN_selectIntrLine, MCAN_enableIntrLine
*
* Global Data :
*
* Return Value : NA
*
*******************************************************************************/
void selectTxIntrLine()
{
/* Select Interrupt Line */
MCAN_selectIntrLine(MCAN_MODULE,
MCAN_INTR_MASK_TX,
MCAN_INTR_LINE_NUM_0);
/* Enable Interrupt Line */
MCAN_enableIntrLine(MCAN_MODULE,
MCAN_INTR_LINE_NUM_0,
1U);
}
/*******************************************************************************
* Function Name : selectRxIntrLine
*
* Service Id : NA
*
* Description : This API will select the interrupt line for Rx
*
* PreConditions : enableInterrupts should be called at least once before this API call
*
* Parameters :
*
* Called functions : MCAN_selectIntrLine, MCAN_enableIntrLine
*
* Global Data :
*
* Return Value : NA
*
*******************************************************************************/
void selectRxIntrLine()
{
/* Select Interrupt Line */
MCAN_selectIntrLine(MCAN_MODULE,
MCAN_INTR_MASK_RX,
MCAN_INTR_LINE_NUM_1);
/* Enable Interrupt Line */
MCAN_enableIntrLine(MCAN_MODULE,
MCAN_INTR_LINE_NUM_1,
1U);
}
/*******************************************************************************
* Function Name : receiveMsgOverMCAN
*
* Service Id : NA
*
* Description : This API will read the received CAN message
*
* PreConditions :
*
* Parameters : rxMsg - refer the structure MCAN_RxBufElement
*
* Called functions : MCAN_getErrCounters, MCAN_getNewDataStatus,
* MCAN_clearNewDataStatus, MCAN_readMsgRam,
* MCAN_getRxFIFOStatus, MCAN_writeRxFIFOAck
*
* Global Data :
*
* Return Value : NA
*
*******************************************************************************/
int32_t receiveMsgOverMCAN(MCAN_RxBufElement *rxMsg, MCAN_ErrCntStatus* errCounter)
{
int32_t status = STW_EFAIL;
MCAN_RxNewDataStatus newDataStatus;
// MCAN_ErrCntStatus errCounter;
gMcanRxIsrFlag = 1U;
/* Checking for Errors */
MCAN_getErrCounters(MCAN_MODULE, errCounter);
if ((0U == errCounter->recErrCnt) &&
(0U == errCounter->canErrLogCnt))
{
MCAN_getNewDataStatus(MCAN_MODULE, &newDataStatus);
MCAN_clearNewDataStatus(MCAN_MODULE, &newDataStatus);
if (gRxBuffCntr > 0U)
{
MCAN_readMsgRam(MCAN_MODULE,
MCAN_MEM_TYPE_BUF,
0U,
0U,
rxMsg);
gRxBuffCntr--;
gIsrCounter--;
}
else if (gRxFifoMsgCntr > 0U)
{
rxFIFO1status.num = MCAN_RX_FIFO_NUM_1;
MCAN_getRxFIFOStatus(MCAN_MODULE, &rxFIFO1status);
MCAN_readMsgRam(MCAN_MODULE,
MCAN_MEM_TYPE_FIFO,
0U,
MCAN_RX_FIFO_NUM_1,
rxMsg);
MCAN_writeRxFIFOAck(MCAN_MODULE, MCAN_RX_FIFO_NUM_1, rxFIFO1status.getIdx);
gIsrCounter--;
gRxFifoMsgCntr--;
}
else if (gRxFifo0MsgCntr > 0U)
{
rxFIFO0status.num = MCAN_RX_FIFO_NUM_0;
MCAN_getRxFIFOStatus(MCAN_MODULE, &rxFIFO0status);
MCAN_readMsgRam(MCAN_MODULE,
MCAN_MEM_TYPE_FIFO,
0U,
MCAN_RX_FIFO_NUM_0,
rxMsg);
MCAN_writeRxFIFOAck(MCAN_MODULE, MCAN_RX_FIFO_NUM_0, rxFIFO0status.getIdx);
gIsrCounter--;
gRxFifo0MsgCntr--;
}
status = STW_SOK;
}
return status;
}
/*******************************************************************************
* Function Name : padConfigPrcmEnable
*
* Service Id : NA
*
* Description : This API will do the pad configuration required for MCAN
*
* PreConditions :
*
* Parameters :
*
* Called functions :
*
* Global Data :
*
* Return Value : NA
*
*******************************************************************************/
void padConfigPrcmEnable()
{
/*Pad configurations - MCAN */
/* Configure mcan_tx, mcan_rx pads on dcan1_tx and dcan1_rx pads */
HW_WR_FIELD32(SOC_CTRL_MODULE_CORE_CORE_PAD_REGISTERS_BASE+CTRL_CORE_CONTROL_SPARE_RW,
CTRL_CORE_CONTROL_SPARE_RW_SEL_ALT_MCAN,
CTRL_CORE_CONTROL_SPARE_RW_SEL_ALT_MCAN_MCAN_DCAN1_PADS);
HW_WR_REG32(SOC_CORE_PAD_IO_REGISTERS_BASE+CTRL_CORE_PAD_DCAN1_TX,0x00040000);
HW_WR_REG32(SOC_CORE_PAD_IO_REGISTERS_BASE+CTRL_CORE_PAD_DCAN1_RX,0x00040000);
/* Enable MCAN clock. */
HW_WR_FIELD32(SOC_WKUPAON_CM_BASE+CM_WKUPAON_ADC_CLKCTRL,
CM_WKUPAON_ADC_CLKCTRL_MODULEMODE,
CM_WKUPAON_ADC_CLKCTRL_MODULEMODE_ENABLE);
while (CM_WKUPAON_ADC_CLKCTRL_IDLEST_FUNC !=
HW_RD_FIELD32(SOC_WKUPAON_CM_BASE+CM_WKUPAON_ADC_CLKCTRL,
CM_WKUPAON_ADC_CLKCTRL_IDLEST))
{
/* wait for module to be enabled */
}
}
/*******************************************************************************
* Function Name : setConfigParams
*
* Service Id : NA
*
* Description : This API will configure the params for global filter
*
* PreConditions :
*
* Parameters : gMcan_globalFilterConfig - refer the structure MCAN_GlobalFiltConfig
*
* Called functions :
*
* Global Data :
*
* Return Value : NA
*
*******************************************************************************/
void setConfigParams(MCAN_GlobalFiltConfig *gMcan_globalFilterConfig)
{
/* Initialize MCAN Config params */
configParams.monEnable = 0x0U;
configParams.asmEnable = 0x0U;
configParams.tsPrescalar = 0xFU;
configParams.tsSelect = 0x0U;
configParams.timeoutSelect = MCAN_TIMEOUT_SELECT_CONT;
configParams.timeoutPreload = 0xFFFFU;
configParams.timeoutCntEnable = 0x0U;
configParams.filterConfig.rrfs = gMcan_globalFilterConfig->rrfs; //0x1U;
configParams.filterConfig.rrfe = gMcan_globalFilterConfig->rrfe; //0x1U;
configParams.filterConfig.anfe = gMcan_globalFilterConfig->anfe; //0x1U;
configParams.filterConfig.anfs = gMcan_globalFilterConfig->anfs; //0x1U;
}
/*******************************************************************************
* Function Name : setMsgRAMParams
*
* Service Id : NA
*
* Description : This API will configure the params for Message RAM
*
* PreConditions :
*
* Parameters : mcan_msgRAMConfigParams - refer the structure MCAN_MsgRAMConfigParams
*
* Called functions :
*
* Global Data :
*
* Return Value : NA
*
*******************************************************************************/
void setMsgRAMParams(MCAN_MsgRAMConfigParams* mcan_msgRAMConfigParams)
{
/* Initialize Message RAM Sections Configuration Parameters */
mcan_msgRAMConfigParams->flssa = MCAN_STD_ID_FILT_START_ADDR;
mcan_msgRAMConfigParams->flesa = MCAN_EXT_ID_FILT_START_ADDR;
mcan_msgRAMConfigParams->txStartAddr = MCAN_TX_BUFF_START_ADDR;
mcan_msgRAMConfigParams->txEventFIFOStartAddr = MCAN_TX_EVENT_START_ADDR;
mcan_msgRAMConfigParams->rxFIFO0startAddr = MCAN_FIFO_0_START_ADDR;
mcan_msgRAMConfigParams->rxFIFO1startAddr = MCAN_FIFO_1_START_ADDR;
mcan_msgRAMConfigParams->rxBufStartAddr = MCAN_RX_BUFF_START_ADDR;
mcan_msgRAMConfigParams->rxBufElemSize = MCAN_ELEM_SIZE_64BYTES;
mcan_msgRAMConfigParams->rxFIFO0ElemSize = MCAN_ELEM_SIZE_64BYTES;
mcan_msgRAMConfigParams->rxFIFO1ElemSize = MCAN_ELEM_SIZE_64BYTES;
}
/*******************************************************************************
* Function Name : initBitTimings
*
* Service Id : NA
*
* Description : This API will configure the bit timings of MCAN
*
* PreConditions :
*
* Parameters :
*
* Called functions :
*
* Global Data :
*
* Return Value : NA
*
*******************************************************************************/
void initBitTimings()
{
/* Initialize bit timings
* Configuring 1Mbps and 5Mbps as nominal and data bit-rate respectively */
bitTimes.nomRatePrescalar = 0x9U;
bitTimes.nomTimeSeg1 = 0xAU;
bitTimes.nomTimeSeg2 = 0x3U;
bitTimes.nomSynchJumpWidth = 0x3U;
bitTimes.dataRatePrescalar = 0x1U;
bitTimes.dataTimeSeg1 = 0x3U;
bitTimes.dataTimeSeg2 = 0x2U;
bitTimes.dataSynchJumpWidth = 0x0U;
}
/*******************************************************************************
* Function Name : initAndConfigMCAN
*
* Service Id : NA
*
* Description : This API will init and config the MCAN
*
* PreConditions :
*
* Parameters : mcan_initParams - refer the structure MCAN_InitParams
* mcan_msgRAMConfigParams - refer the structure MCAN_MsgRAMConfigParams
* mcan_stdFiltelem - refer the structure MCAN_StdMsgIDFilterElement
* mcan_globalFilterConfig - refer the structure MCAN_GlobalFiltConfig
* mcan_extIdFiltelem - refer the structure MCAN_ExtMsgIDFilterElement
*
* Called functions : setConfigParams, setMsgRAMParams, initBitTimings,
* MCAN_isFDOpEnable, MCAN_isMemInitDone, MCAN_setOpMode
* MCAN_getOpMode, MCAN_init, MCAN_config, MCAN_setBitTime,
* MCAN_setExtIDAndMask, MCAN_msgRAMConfig, MCAN_addStdMsgIDFilter,
* MCAN_addExtMsgIDFilter,
*
* Global Data :
*
* Return Value : status of init and config of MCAN
*
*******************************************************************************/
int32_t initAndConfigMCAN( MCAN_InitParams* mcan_initParams,
MCAN_MsgRAMConfigParams* mcan_msgRAMConfigParams,
MCAN_StdMsgIDFilterElement* mcan_stdFiltelem,
MCAN_GlobalFiltConfig* mcan_globalFilterConfig,
MCAN_ExtMsgIDFilterElement* mcan_extIdFiltelem
)
{
uint32_t fdoe;
int32_t configStatus = STW_SOK;
//setInitParams(mcan_initParams);
setConfigParams(mcan_globalFilterConfig);
setMsgRAMParams(mcan_msgRAMConfigParams);
//setFilterElement(mcan_stdFiltelem);
initBitTimings();
/* Enable Auto wakeup */
fdoe = MCAN_isFDOpEnable(MCAN_MODULE);
if ((uint32_t)TRUE != fdoe)
{
configStatus = STW_EFAIL;
}
/* wait for memory initialization to happen */
while (FALSE == MCAN_isMemInitDone(MCAN_MODULE))
{}
/* Put MCAN in SW initialization mode */
MCAN_setOpMode(MCAN_MODULE, MCAN_OPERATION_MODE_SW_INIT);
while (MCAN_OPERATION_MODE_SW_INIT != MCAN_getOpMode(MCAN_MODULE))
{}
/* Initialize MCAN module */
MCAN_init(MCAN_MODULE, mcan_initParams);
/* Configure MCAN module */
MCAN_config(MCAN_MODULE, &configParams);
/* Configure Bit timings */
MCAN_setBitTime(MCAN_MODULE, &bitTimes);
/* Set Extended ID Mask */
MCAN_setExtIDAndMask(MCAN_MODULE, MCAN_EXT_ID_AND_MASK);
/* Configure Message RAM Sections */
MCAN_msgRAMConfig(MCAN_MODULE, mcan_msgRAMConfigParams);
/* Configure Standard ID filter element */
MCAN_addStdMsgIDFilter(MCAN_MODULE, 0U, mcan_stdFiltelem);
/* Configure Extended ID filter element */
MCAN_addExtMsgIDFilter(MCAN_MODULE, 0U, mcan_extIdFiltelem);
/* Take MCAN out of the SW initialization mode */
MCAN_setOpMode(MCAN_MODULE, MCAN_OPERATION_MODE_NORMAL);
while (MCAN_OPERATION_MODE_NORMAL != MCAN_getOpMode(MCAN_MODULE))
{}
return configStatus;
}
/*******************************************************************************
* Function Name : resetTxIsrFlag
*
* Service Id : NA
*
* Description : This API will reset the Tx ISR flag
*
* PreConditions :
*
* Parameters :
*
* Called functions :
*
* Global Data : gMcanTxIsrFlag
*
* Return Value : NA
*
*******************************************************************************/
void resetTxIsrFlag()
{
gMcanTxIsrFlag = 0U;
}
/*******************************************************************************
* Function Name : resetRxIsrFlag
*
* Service Id : NA
*
* Description : This API will reset the Rx ISR flag, and increment the RX and ISR counters
*
* PreConditions :
*
* Parameters :
*
* Called functions :
*
* Global Data : gMcanRxIsrFlag, gIsrCounter, gRxBuffCntr
*
* Return Value : NA
*
*******************************************************************************/
void resetRxIsrFlag()
{
gMcanRxIsrFlag = 0U;
gIsrCounter++;
gRxBuffCntr++;
}
/*******************************************************************************
* Function Name : resetRxIsrFlagFifoFlag
*
* Service Id : NA
*
* Description : This API will reset the Rx ISR flag, and increment the RX, FIFO and ISR counters
*
* PreConditions :
*
* Parameters :
*
* Called functions :
*
* Global Data : gMcanRxIsrFlag, gRxFifoMsgCntr, gIsrCounter
*
* Return Value : NA
*
*******************************************************************************/
void resetRxIsrFlagFifoFlag(uint8_t fifoBuff0)
{
gMcanRxIsrFlag = 0U;
if(0U == fifoBuff0)
{
gRxFifoMsgCntr++;
}
else if(1U == fifoBuff0)
{
gRxFifo0MsgCntr++;
}
gIsrCounter++;
}
/*******************************************************************************
* Function Name : getIsrCntr
*
* Service Id : NA
*
* Description : This API will return the ISR counter variable address
*
* PreConditions :
*
* Parameters :
*
* Called functions :
*
* Global Data : gIsrCounter
*
* Return Value : NA
*
*******************************************************************************/
void getIsrCntr(int32_t *cntr)
{
*cntr = gIsrCounter;
}
/*******************************************************************************
* Company : HARMAN
*
* File Name : harman_utils_mcan_proto_A.c
*
* Version : 01.00.00
*
* Date : 11-June-2018
*
* Operating Environment : TDA2Px
*
* Compiler with Version Number : ti-cgt-arm_16.9.2.LTS
*
* Description : Init, configure, transmit and receive API's for MCAN
*
* Created by : HARMAN
*
* Copyright (C) 2018 by HARMAN
* All rights reserved.
* This code contains information that is proprietary to HARMAN
* No part of this code may be reproduced or used in whole or part in any form
* or by any means - graphic, electronic or mechanical without the written
* permission of HARMAN
*******************************************************************************/
/*******************************************************************************
** Revision History **
*******************************************************************************/
/*
* V01.00.00: 11-Jun-2018 : Initial Version
*/
/******************************************************************************/
/*==============================================================================
Following are the MISRA C Violations
=============================================================================*/
/*
*/
/*==============================================================================
** Include Section **
==============================================================================*/
#include <stdint.h>
#include <string.h>
#include <xdc/std.h>
#include <ti/csl/csl_types.h>
#include <ti/drv/vps/include/common/bsp_utils.h>
#include <ti/csl/hw_types.h>
#include <ti/drv/stw_lld/platform/irq_xbar_interrupt_ids.h>
#include <ti/csl/soc.h>
#include <ti/drv/stw_lld/platform/platform.h>
#include "include/link_api/system.h"
#include "include/link_api/system_common.h"
#include "harman_utils_mcan_proto_A.h"
#define DEBUG_UTILS_MCAN
/*==============================================================================
** Global Data **
==============================================================================*/
MCAN_TxBufElement transmitMsg;
MCAN_RxBufElement receiveMsg;
MCAN_InitParams gMcan_initParams;
MCAN_MsgRAMConfigParams gMcan_msgRAMConfigParams;
MCAN_StdMsgIDFilterElement gMcan_stdFiltelem;
MCAN_GlobalFiltConfig gMcan_globalFilterConfig;
MCAN_ExtMsgIDFilterElement gMcan_extIdFiltelem;
uint32_t rxIsrFlagStatus = 0U;
uint32_t txIsrFlagStatus = 0U;
uint32_t gCntrForIsr = 0U;
uint32_t gCntrForData = 0U;
uint32_t xBarOnlyOnce = 0U;
volatile uint64_t can_isr_tx_success_counter = 0U;
volatile uint64_t can_isr_rx_counter = 0U;
volatile uint64_t can_recv_read_success = 0U;
static uint64_t time_delta_ISR[1600] = {0};
static uint64_t time_delta_ReceiveRead[1600] = {0};
#ifdef EVENT_RX
Event_Handle mcanRxEvent;
Event_Struct mcanRxEventMem;
Event_Handle mcanRxQueueEvent;
Event_Struct mcanRxQueueEventMem;
Utils_QueHandle rxMsgQueueHandle;
#endif
MCAN_RxBufElement *rxQueue[MAX_QUEUE_SIZE];
MCAN_RxBufElement rxdata[MAX_QUEUE_SIZE];
MCAN_ECCErrStatus gMcaneccErr;
static Bool rxMsgFlag = FALSE;
void initAndConfigMCANParams( mcanInitParams* initParams,
mcanMsgRAMConfigParams* configRamParams,
mcanFilterConfig* globalfilterParams,
mcanStdMsgIDFilterElement *stdIdFilter,
mcanExtMsgIDFilterElement *extIdFilter
);
/*==============================================================================
** Function Definitions **
==============================================================================*/
/*******************************************************************************
* Function Name : mcanTxISR
*
* Service Id : NA
*
* Description : Transmit ISR for the MCAN
*
* PreConditions :
*
* Parameters : NA
*
* Called functions : MCAN_getIntrStatus, MCAN_clearIntrStatus,
* resetTxIsrFlag,
*
* Global Data : MCAN_MODULE, MCAN_INTR_SRC_TRANS_COMPLETE
*
* Return Value : NA
*
*******************************************************************************/
void mcanTxISR(void)
{
uint32_t intrStatus;
intrStatus = MCAN_getIntrStatus(MCAN_MODULE);
MCAN_clearIntrStatus(MCAN_MODULE, intrStatus);
if (MCAN_INTR_SRC_TRANS_COMPLETE ==
(intrStatus & MCAN_INTR_SRC_TRANS_COMPLETE))
{
++can_isr_tx_success_counter;
resetTxIsrFlag();//gMcanTxIsrFlag = 0U;
}
else if (MCAN_INTR_SRC_BUS_OFF_STATUS == (intrStatus & MCAN_INTR_SRC_BUS_OFF_STATUS))
{
Vps_printf(" UTILS: MCAN Tx (BUS OFF Error Occurred)Interrupt Status: %x !!!\n", intrStatus);
}
else
{
Vps_printf(" UTILS: MCAN Tx Interrupt Status: %x !!!\n", intrStatus);
}
}
#ifdef EVENT_RX
/*******************************************************************************
* Function Name : mcanRxISR
*
* Service Id : NA
*
* Description : Receive ISR for the MCAN
*
* PreConditions :
*
* Parameters : NA
*
* Called functions : MCAN_getIntrStatus, MCAN_clearIntrStatus,
* resetRxIsrFlag, resetRxIsrFlagFifoFlag
* Event_post
*
* Global Data : MCAN_MODULE, MCAN_INTR_SRC_DEDICATED_RX_BUFF_MSG,
* MCAN_INTR_SRC_RX_FIFO1_NEW_MSG, UTILS_MCAN_RX_EVENT
*
* Return Value : NA
*
*******************************************************************************/
void mcanRxISR(void )
{
uint32_t intrStatus;
intrStatus = MCAN_getIntrStatus(MCAN_MODULE);
MCAN_clearIntrStatus(MCAN_MODULE, intrStatus);
gCntrForIsr++;
if (MCAN_INTR_SRC_DEDICATED_RX_BUFF_MSG ==
(intrStatus & MCAN_INTR_SRC_DEDICATED_RX_BUFF_MSG))
{
resetRxIsrFlag();//gMcanRxIsrFlag = 0U;
Event_post(mcanRxEvent,UTILS_MCAN_RX_EVENT);
rxMsgFlag = TRUE;
}
else if (MCAN_INTR_SRC_RX_FIFO1_NEW_MSG
== (intrStatus & MCAN_INTR_SRC_RX_FIFO1_NEW_MSG))
{
++can_isr_rx_counter;
if (1501 > can_isr_rx_counter)
{
time_delta_ISR[can_isr_rx_counter] = Utils_getCurGlobalTimeInUsec();
}
resetRxIsrFlagFifoFlag(0U);
Event_post(mcanRxEvent,UTILS_MCAN_RX_EVENT);
rxMsgFlag = TRUE;
}
else if (MCAN_INTR_SRC_RX_FIFO0_NEW_MSG
== (intrStatus & MCAN_INTR_SRC_RX_FIFO0_NEW_MSG))
{
resetRxIsrFlagFifoFlag(1U);
Event_post(mcanRxEvent,UTILS_MCAN_RX_EVENT);
rxMsgFlag = TRUE;
}
else if(MCAN_INTR_SRC_RX_FIFO1_MSG_LOST == (intrStatus & MCAN_INTR_SRC_RX_FIFO1_MSG_LOST))
{
Vps_printf(" UTILS: MCAN Rx (RX_FIFO1_MSG_LOST)Interrupt Status: %x !!!\n", intrStatus);
}
else if(MCAN_INTR_SRC_RX_FIFO1_FULL == (intrStatus & MCAN_INTR_SRC_RX_FIFO1_FULL))
{
resetRxIsrFlagFifoFlag(0U);
Event_post(mcanRxEvent,UTILS_MCAN_RX_EVENT);
rxMsgFlag = TRUE;
Vps_printf(" UTILS: MCAN Rx (RX_FIFO1_FULL)Interrupt Status: %x !!!\n", intrStatus);
}
else if(MCAN_INTR_SRC_RX_FIFO0_MSG_LOST == (intrStatus & MCAN_INTR_SRC_RX_FIFO0_MSG_LOST))
{
Vps_printf(" UTILS: MCAN Rx (RX_FIFO0_MSG_LOST)Interrupt Status: %x !!!\n", intrStatus);
}
else if(MCAN_INTR_SRC_RX_FIFO0_FULL == (intrStatus & MCAN_INTR_SRC_RX_FIFO0_FULL))
{
resetRxIsrFlagFifoFlag(1U);
Event_post(mcanRxEvent,UTILS_MCAN_RX_EVENT);
rxMsgFlag = TRUE;
Vps_printf(" UTILS: MCAN Rx (RX_FIFO0_FULL)Interrupt Status: %x !!!\n", intrStatus);
}
else if (MCAN_INTR_SRC_BUS_OFF_STATUS
== (intrStatus & MCAN_INTR_SRC_BUS_OFF_STATUS))
{
Vps_printf(" UTILS: MCAN Rx (BUS OFF Error Occurred)Interrupt Status: %x !!!\n", intrStatus);
}
else
{
Vps_printf(" UTILS: MCAN Rx Interrupt Status: %x !!!\n", intrStatus);
}
}
#else
/*******************************************************************************
* Function Name : mcanRxISR
*
* Service Id : NA
*
* Description : Receive ISR for the MCAN
*
* PreConditions :
*
* Parameters : NA
*
* Called functions : MCAN_getIntrStatus, MCAN_clearIntrStatus,
* resetRxIsrFlag,
*
*
* Global Data : MCAN_MODULE, MCAN_INTR_SRC_DEDICATED_RX_BUFF_MSG,
* UTILS_MCAN_RX_EVENT
*
* Return Value : NA
*
*******************************************************************************/
void mcanRxISR(void)
{
uint32_t intrStatus;
intrStatus = MCAN_getIntrStatus(MCAN_MODULE);
MCAN_clearIntrStatus(MCAN_MODULE, intrStatus);
if (MCAN_INTR_SRC_DEDICATED_RX_BUFF_MSG ==
(intrStatus & MCAN_INTR_SRC_DEDICATED_RX_BUFF_MSG))
{
resetRxIsrFlag();//gMcanRxIsrFlag = 0U;
}
else
{
Vps_printf(" UTILS: MCAN Rx Interrupt Status: %x !!!\n", intrStatus);
}
}
#endif
/*******************************************************************************
* Function Name : mcanECCISR
*
* Service Id : NA
*
* Description : ECC ISR for the MCAN
*
* PreConditions :
*
* Parameters : NA
*
* Called functions : MCAN_eccGetErrorStatus, MCAN_eccClearErrorStatus,
* MCAN_eccWriteEOI,
*
*
* Global Data : MCAN_MODULE, MCAN_ECC_ERR_TYPE_SEC,
* MCAN_ECC_ERR_TYPE_DED
*
* Return Value : NA
*
*******************************************************************************/
void mcanECCISR(void)
{
MCAN_eccGetErrorStatus(MCAN_MODULE, &gMcaneccErr);
if (1U == gMcaneccErr.secErr)
{
MCAN_eccClearErrorStatus(MCAN_MODULE, MCAN_ECC_ERR_TYPE_SEC);
MCAN_eccWriteEOI(MCAN_MODULE, MCAN_ECC_ERR_TYPE_SEC);
}
if (1U == gMcaneccErr.dedErr)
{
MCAN_eccClearErrorStatus(MCAN_MODULE, MCAN_ECC_ERR_TYPE_DED);
MCAN_eccWriteEOI(MCAN_MODULE, MCAN_ECC_ERR_TYPE_DED);
}
}
/*******************************************************************************
* Function Name : mcanTSISR
*
* Service Id : NA
*
* Description : TS ISR for the MCAN
*
* PreConditions :
*
* Parameters : NA
*
* Called functions :
*
* Global Data :
*
* Return Value : NA
*
*******************************************************************************/
void mcanTSISR(void )
{
Vps_printf(" UTILS: MCAN Time Stamp overflow happened !!!\n");
}
/*******************************************************************************
* Function Name : Utils_mcanXBarConfig
*
* Service Id : NA
*
* Description : ISR registration API
*
* PreConditions :
*
* Parameters : NA
*
* Called functions : IntXbar_connectIRQ, BspOsal_registerIntr,
* Hwi_enableInterrupt, Hwi_restore
*
* Global Data :
*
* Return Value : Status of ISR registration
*
*******************************************************************************/
int32_t Utils_mcanXBarConfig(void)
{
Int32 configStatus = STW_SOK;
UInt32 cookie = 0;
//IntXbar_connectIRQ(MCAN_INT_TX_M4, MCAN_IRQ_INT0);
//IntXbar_connectIRQ(MCAN_INT_RX_M4, MCAN_IRQ_INT1);
//IntXbar_connectIRQ(MCAN_ECC_INT, MCAN_IRQ_ECC);
//IntXbar_connectIRQ(MCAN_TS_INT, MCAN_IRQ_TS);
CSL_xbarIrqConfigure(XBAR_CPU, XBAR_MCAN_INT0, XBAR_INTR0_SOURCE);
CSL_xbarIrqConfigure(XBAR_CPU, CSL_XBAR_MCAN_IRQ_INT1, XBAR_INTR1_SOURCE);
CSL_xbarIrqConfigure(XBAR_CPU, XBAR_MCAN_INT0, XBAR_INTR0_SOURCE);
CSL_xbarIrqConfigure(XBAR_CPU, XBAR_MCAN_INT0, XBAR_INTR0_SOURCE);
/* Disabling the global interrupts */
cookie = Hwi_disable();
BspOsal_IntrHandle hndlIntr0 = NULL;
BspOsal_IntrHandle hndlIntr1 = NULL;
BspOsal_IntrHandle hndlIntrECC = NULL;
BspOsal_IntrHandle hndlIntrTS = NULL;
hndlIntr0 = BspOsal_registerIntr(MCAN_INT_TX_M4,
(BspOsal_IntrFuncPtr)mcanTxISR,
0U
);
hndlIntr1 = BspOsal_registerIntr(MCAN_INT_RX_M4,
(BspOsal_IntrFuncPtr)mcanRxISR,
0U
);
hndlIntrECC = BspOsal_registerIntr(MCAN_ECC_INT,
(BspOsal_IntrFuncPtr)mcanECCISR,
0U
);
hndlIntrTS = BspOsal_registerIntr(MCAN_TS_INT,
(BspOsal_IntrFuncPtr)mcanTSISR,
0U
);
if( (hndlIntr0 == NULL) || (hndlIntr1 == NULL) || (hndlIntrECC == NULL) || (hndlIntrTS == NULL))
{
Vps_printf(" UTILS: MCAN INTERRUPT: BspOsal_registerIntr Failed !!!\n");
UTILS_assert(0);
}
/* Enable the interrupt */
Hwi_enableInterrupt(MCAN_INT_TX_M4);
Hwi_enableInterrupt(MCAN_INT_RX_M4);
Hwi_enableInterrupt(MCAN_ECC_INT);
Hwi_enableInterrupt(MCAN_TS_INT );
/* Restore interrupts */
Hwi_restore(cookie);
return configStatus;
}
/*******************************************************************************
* Function Name : Utils_initTxStructure
*
* Service Id : NA
*
* Description : Init the Transmitmessage structure
*
* PreConditions :
*
* Parameters : NA
*
* Called functions :
*
* Global Data :
*
* Return Value : NA
*
*******************************************************************************/
void Utils_initTxStructure()
{
/* Initialize message to transmit */
transmitMsg.id = 0x0;//(uint32_t)((uint32_t)(0x4U) << 18U);
transmitMsg.rtr = 0U;
transmitMsg.xtd = 0U;
transmitMsg.esi = 0U;
transmitMsg.dlc = 0U;
transmitMsg.brs = 1U;
transmitMsg.fdf = 0U;
transmitMsg.efc = 1U;
transmitMsg.mm = 0xAAU;
}
/*******************************************************************************
* Function Name : Utils_mcanInit
*
* Service Id : NA
*
* Description : Init the MCAN with received params
*
* PreConditions :
*
* Parameters : NA
*
* Called functions : Utils_initTxStructure, initAndConfigMCANParams,
* configureMCANModule, Utils_mcanXBarConfig,
* enableMcanModule, initAndConfigMCAN, enableInterrupts,
* selectRxIntrLine, Event_Params_init, Event_construct,
* Event_handle, Utils_queCreate
*
* Global Data :
*
* Return Value : Status of init
*
*******************************************************************************/
Int32 Utils_mcanInit( mcanInitParams* initParams,
mcanMsgRAMConfigParams* configRamParams,
mcanFilterConfig* filterParams,
mcanStdMsgIDFilterElement *stdIdFilter,
mcanExtMsgIDFilterElement *extIdFilter
)
{
Int32 status = STW_EFAIL;
Utils_initTxStructure();
//PlatformUnlockMMR();
initAndConfigMCANParams(initParams, configRamParams, filterParams, stdIdFilter, extIdFilter);
status = configureMCANModule();
if (STW_SOK == status)
{
if (0 == xBarOnlyOnce)
{
status = Utils_mcanXBarConfig();
xBarOnlyOnce = 1;
}
enableMcanModule();
if (STW_SOK == status)
{
status = initAndConfigMCAN(&gMcan_initParams, &gMcan_msgRAMConfigParams, &gMcan_stdFiltelem, &gMcan_globalFilterConfig, &gMcan_extIdFiltelem);
if (STW_EFAIL == status)
{
Vps_printf(" UTILS: MCAN initAndConfigMCAN failed !!!\n");
}
/* enable the interrupts */
enableInterrupts();
/* Select the receive interrupt line */
/* by default receive intr line is selected, required intr line will be selected based on the flagStatus of tx and rx isr's*/
selectRxIntrLine();
txIsrFlagStatus = 0U;
rxIsrFlagStatus = 1U;
}
else
{
Vps_printf(" UTILS: MCAN configureMCANModule failed !!!\n");
UTILS_assert(0);
}
}
else
{
Vps_printf(" UTILS: MCAN Utils_mcanXBarConfig failed !!!\n");
UTILS_assert(0);
}
#ifdef EVENT_RX
Event_Params eventParams;
Event_Params_init(&eventParams);
Event_construct(&mcanRxEventMem, &eventParams);
mcanRxEvent = Event_handle(&mcanRxEventMem);
Event_Params eventParamsQ;
Event_Params_init(&eventParamsQ);
Event_construct(&mcanRxQueueEventMem, &eventParamsQ);
mcanRxQueueEvent = Event_handle(&mcanRxQueueEventMem);
#endif
//rxQueue = ((MCAN_RxBufElement)*)malloc(sizeof(MCAN_RxBufElement) * MAX_QUEUE_SIZE);
Utils_queCreate(&rxMsgQueueHandle,
MAX_QUEUE_SIZE,
&rxQueue[0],
UTILS_QUE_FLAG_NO_BLOCK_QUE);
return status;
}
/*******************************************************************************
* Function Name : Utils_mcanTransmitMsg
*
* Service Id : NA
*
* Description : Transmit message
*
* PreConditions :
*
* Parameters : NA
*
* Called functions : selectTxIntrLine, transmitMsgOverMCAN, selectRxIntrLine
*
* Global Data :
*
* Return Value : Status of transmission of message
*
*******************************************************************************/
Int32 Utils_mcanTransmitMsg(mcanMsg_t *txMsg)
{
if(can_isr_tx_success_counter != 0U
&& 0U == (can_isr_tx_success_counter % 100U))
{
#ifdef DEBUG_UTILS_MCAN
Vps_printf("can_isr_tx_success_counter=%llu, can_isr_rx_counter=%llu, can_recv_read_success=%llu",
can_isr_tx_success_counter, can_isr_rx_counter, can_recv_read_success);
#endif
}
if(txIsrFlagStatus == 0U)
{
/* Select the Tx interrupt line */
selectTxIntrLine();
txIsrFlagStatus = 1U;
rxIsrFlagStatus = 0U;
}
Int32 status = STW_EFAIL;
UInt32 dataIdx = 0U;
if(1 == txMsg->idType) // for extended 29 bit id
{
transmitMsg.id = txMsg->msgId;
transmitMsg.xtd = 1U;
}
else // for standard 11 bit id
{
transmitMsg.id = (txMsg->msgId << (STD_ID_SHIFT));
transmitMsg.xtd = 0U;
}
if(0 == txMsg->frameType) // for Classic CAN frame
{
transmitMsg.fdf = txMsg->frameType;
if(txMsg->dataLengthCount > 8U)
{
transmitMsg.dlc = 8U;
}
else
{
transmitMsg.dlc = txMsg->dataLengthCount;
}
}
else // for CAN-FD frame
{
transmitMsg.fdf = MCAN_FD_FRAME;
transmitMsg.dlc = txMsg->dataLengthCount;
}
/* copy data into tx message */
for(dataIdx = 0; dataIdx < transmitMsg.dlc; dataIdx++)
{
transmitMsg.data[dataIdx] = txMsg->dataBuffer[dataIdx];
}
if(rxMsgFlag == TRUE)
{
status = transmitMsgOverMCAN(&transmitMsg);
}
status = STW_SOK;
if(STW_EFAIL == status)
{
Vps_printf(" UTILS: Utils_mcanTransmitMsg failed !!!\n");
UTILS_assert(0);
}
if (rxIsrFlagStatus == 0U)
{
/* Select the Rx interrupt line */
selectRxIntrLine();
rxIsrFlagStatus = 1U;
txIsrFlagStatus = 0U;
}
return status;
}
/*******************************************************************************
* Function Name : Utils_mcanReceiveMsg
*
* Service Id : NA
*
* Description : Receive message
*
* PreConditions :
*
* Parameters : NA
*
* Called functions : selectRxIntrLine, Event_pend, getIsrCntr,
* receiveMsgOverMCAN, Utils_queIsFull, Utils_quePut,
* Event_post
*
* Global Data :
*
* Return Value : Status of receiving message
*
*******************************************************************************/
Int32 Utils_mcanReceiveMsg(mcanMsg_t *rxMsg)
{
if (rxIsrFlagStatus == 0U)
{
/* Select the Rx interrupt line */
selectRxIntrLine();
rxIsrFlagStatus = 1U;
txIsrFlagStatus = 0U;
}
Int32 status = STW_EFAIL;
#ifdef EVENT_RX
UInt32 msgId;
UInt postedEvents;
UInt32 eventMask = 0;
eventMask |= UTILS_MCAN_RX_EXIT_EVENT;
eventMask |= UTILS_MCAN_RX_EVENT;
Bool exitLoop = FALSE;
Int32 loopCntr = 0;
Int32 lpCntr = 0;
Int32 qStatus = 0;
Int32 index = 0;
Bool qFull = FALSE;
#endif
do
{
postedEvents = Event_pend(mcanRxEvent,0,eventMask,
BSP_OSAL_WAIT_FOREVER);
getIsrCntr(&loopCntr);
for(lpCntr = 0; lpCntr < loopCntr; lpCntr++)
{
index = rxMsgQueueHandle.curWr;
gCntrForData++;
if (postedEvents & UTILS_MCAN_RX_EXIT_EVENT)
//if(200 == gCntrForData)
{
exitLoop = TRUE;
}
else
{
//status = receiveMsgOverMCAN(&receiveMsg);
MCAN_ErrCntStatus errCounter;
memset(&errCounter, 0, sizeof(errCounter));
status = receiveMsgOverMCAN(&rxdata[index], &errCounter);
//rxdata
if(0 == rxdata[index].xtd)
{
msgId = (((rxdata[index].id)>>1)&0x7FF);
rxdata[index].id = msgId;
}
//Vps_printf( "Message ID: 0x%x ", rxdata[index].id);
//Vps_printf( "Data : 0x%x", rxdata[index].data[0]);
if(STW_EFAIL == status)
{
Vps_printf("UTILS: rx failed !!!\n");
Vps_printf("WARNING: CAN Rx error counter reached");
Vps_printf(
"MCAN_ErrCntStatus: transErrLogCnt=%u, recErrCnt=%u, rpStatus=%u, canErrLogCnt=%u",
errCounter.transErrLogCnt, errCounter.recErrCnt, errCounter.rpStatus, errCounter.canErrLogCnt);
}
else
{
++can_recv_read_success;
if (1501 > can_recv_read_success)
{
time_delta_ReceiveRead[can_recv_read_success] = Utils_getCurGlobalTimeInUsec();
}
if((1501 == can_isr_rx_counter)&&(1501 == can_recv_read_success))
{
UInt64 i = 0U;
for(i = 0; i < 1501; ++i)
{
Vps_printf("RX ISR: i: %llu, time_delta_ISR: %llu , time_delta_ReceiveRead: %llu", i, time_delta_ISR[i],time_delta_ReceiveRead[i]);
BspOsal_sleep(1U);
}
}
qFull = (Bool)Utils_queIsFull(&rxMsgQueueHandle);
if(qFull == FALSE)
{
qStatus = Utils_quePut(&rxMsgQueueHandle,&rxdata[index],BIOS_NO_WAIT);
UTILS_assert(qStatus == 0);
Event_post(mcanRxQueueEvent,UTILS_MCAN_RX_QUEUE_EVENT);
index++;
if(index >= MAX_QUEUE_SIZE)
{
index = 0U;
}
}
else
{
Vps_printf(" UTILS: Queue Full !!!\n");
}
}
}
}
}while(exitLoop!= TRUE);
//Vps_printf("gCntrForData = %d", gCntrForData);
// Vps_printf("gCntrForIsr = %d", gCntrForIsr);
return status;
}
/*******************************************************************************
* Function Name : initAndConfigMCANParams
*
* Service Id : NA
*
* Description : Init and Configure MCAN parameters
*
* PreConditions :
*
* Parameters : NA
*
* Called functions : selectRxIntrLine, Event_pend, getIsrCntr,
* receiveMsgOverMCAN, Utils_queIsFull, Utils_quePut,
* Event_post
*
* Global Data : gMcan_initParams, gMcan_msgRAMConfigParams,
* gMcan_globalFilterConfig, gMcan_stdFiltelem,
* gMcan_extIdFiltelem
*
* Return Value : Status of init and configuration of MCAN parameters
*
*******************************************************************************/
void initAndConfigMCANParams( mcanInitParams* initParams,
mcanMsgRAMConfigParams* configRamParams,
mcanFilterConfig* globalfilterParams,
mcanStdMsgIDFilterElement *stdIdFilter,
mcanExtMsgIDFilterElement *extIdFilter
)
{
if(initParams != NULL)
{
gMcan_initParams.fdMode = initParams->fdMode;
gMcan_initParams.brsEnable = initParams->brsEnable;
gMcan_initParams.txpEnable = initParams->txpEnable;
gMcan_initParams.efbi = initParams->efbi;
gMcan_initParams.pxhddisable = initParams->pxhddisable;
gMcan_initParams.darEnable = initParams->darEnable;
gMcan_initParams.wkupReqEnable = initParams->wkupReqEnable;
gMcan_initParams.autoWkupEnable = initParams->autoWkupEnable;
gMcan_initParams.emulationEnable = initParams->emulationEnable;
gMcan_initParams.emulationFAck = initParams->emulationFAck;
gMcan_initParams.clkStopFAck = initParams->clkStopFAck;
gMcan_initParams.wdcPreload = initParams->wdcPreload;
gMcan_initParams.tdcEnable = initParams->tdcEnable;
gMcan_initParams.tdcConfig.tdcf = initParams->tdcf;
gMcan_initParams.tdcConfig.tdco = initParams->tdco;
}
else
{
gMcan_initParams.fdMode = 0x0U;
gMcan_initParams.brsEnable = 0x0U;
gMcan_initParams.txpEnable = 0x0U;
gMcan_initParams.efbi = 0x0U;
gMcan_initParams.pxhddisable = 0x0U;
gMcan_initParams.darEnable = 0x0U;
gMcan_initParams.wkupReqEnable = 0x1U;
gMcan_initParams.autoWkupEnable = 0x1U;
gMcan_initParams.emulationEnable = 0x1U;
gMcan_initParams.emulationFAck = 0x0U;
gMcan_initParams.clkStopFAck = 0x0U;
gMcan_initParams.wdcPreload = 0xFFU;
gMcan_initParams.tdcEnable = 0x1U;
gMcan_initParams.tdcConfig.tdcf = 0xAU;
gMcan_initParams.tdcConfig.tdco = 0x6U;
}
gMcan_msgRAMConfigParams.flssa = MCAN_STD_ID_FILT_START_ADDR;
gMcan_msgRAMConfigParams.flesa = MCAN_EXT_ID_FILT_START_ADDR;
gMcan_msgRAMConfigParams.txStartAddr = MCAN_TX_BUFF_START_ADDR;
gMcan_msgRAMConfigParams.txEventFIFOStartAddr = MCAN_TX_EVENT_START_ADDR;
gMcan_msgRAMConfigParams.rxFIFO0startAddr = MCAN_FIFO_0_START_ADDR;
gMcan_msgRAMConfigParams.rxFIFO1startAddr = MCAN_FIFO_1_START_ADDR;
gMcan_msgRAMConfigParams.rxBufStartAddr = MCAN_RX_BUFF_START_ADDR;
gMcan_msgRAMConfigParams.rxBufElemSize = MCAN_ELEM_SIZE_64BYTES;
gMcan_msgRAMConfigParams.rxFIFO0ElemSize = MCAN_ELEM_SIZE_64BYTES;
gMcan_msgRAMConfigParams.rxFIFO1ElemSize = MCAN_ELEM_SIZE_64BYTES;
if (configRamParams != NULL)
{
gMcan_msgRAMConfigParams.lss = configRamParams->lss;
gMcan_msgRAMConfigParams.lse = configRamParams->lse;
gMcan_msgRAMConfigParams.txBufNum = configRamParams->txBufNum;
gMcan_msgRAMConfigParams.txFIFOSize = configRamParams->txFIFOSize;
gMcan_msgRAMConfigParams.txBufMode = configRamParams->txBufMode;
gMcan_msgRAMConfigParams.txBufElemSize = configRamParams->txBufElemSize;
gMcan_msgRAMConfigParams.txEventFIFOSize = configRamParams->txEventFIFOSize;
gMcan_msgRAMConfigParams.txEventFIFOWaterMark = configRamParams->txEventFIFOWaterMark;
gMcan_msgRAMConfigParams.rxFIFO0size = configRamParams->rxFIFO0size;
gMcan_msgRAMConfigParams.rxFIFO0waterMark = configRamParams->rxFIFO0waterMark;
gMcan_msgRAMConfigParams.rxFIFO0OpMode = configRamParams->rxFIFO0OpMode;
gMcan_msgRAMConfigParams.rxFIFO1size = configRamParams->rxFIFO1size;
gMcan_msgRAMConfigParams.rxFIFO1waterMark = configRamParams->rxFIFO1waterMark;
gMcan_msgRAMConfigParams.rxFIFO1OpMode = configRamParams->rxFIFO1OpMode;
}
else
{
gMcan_msgRAMConfigParams.lss = MCAN_STD_ID_FILTER_NUM;
gMcan_msgRAMConfigParams.lse = MCAN_EXT_ID_FILTER_NUM;
gMcan_msgRAMConfigParams.txBufNum = MCAN_TX_BUFF_SIZE;
gMcan_msgRAMConfigParams.txFIFOSize = MCAN_TX_FIFO_SIZE;
gMcan_msgRAMConfigParams.txBufMode = MCAN_TX_BUFF_MODE;
gMcan_msgRAMConfigParams.txBufElemSize = MCAN_ELEM_SIZE_64BYTES;
gMcan_msgRAMConfigParams.txEventFIFOSize = MCAN_TX_BUFF_SIZE;
gMcan_msgRAMConfigParams.txEventFIFOWaterMark = MCAN_TX_EVENT_FIFO_WATERMARK;
gMcan_msgRAMConfigParams.rxFIFO0size = MCAN_FIFO_0_NUM;
gMcan_msgRAMConfigParams.rxFIFO0waterMark = MCAN_RX_FIFO_0_WATERMARK;
gMcan_msgRAMConfigParams.rxFIFO0OpMode = 0x1;
gMcan_msgRAMConfigParams.rxFIFO1size = MCAN_FIFO_1_NUM;
gMcan_msgRAMConfigParams.rxFIFO1waterMark = MCAN_RX_FIFO_1_WATERMARK;
gMcan_msgRAMConfigParams.rxFIFO1OpMode = 0x1;
}
if(NULL != globalfilterParams)
{
gMcan_globalFilterConfig.rrfe = globalfilterParams->rrfe;
gMcan_globalFilterConfig.rrfs = globalfilterParams->rrfs;
gMcan_globalFilterConfig.anfe = globalfilterParams->anfe;
gMcan_globalFilterConfig.anfs = globalfilterParams->anfs;
}
else
{
gMcan_globalFilterConfig.rrfe = 0x1U;
gMcan_globalFilterConfig.rrfs = 0x1U;
gMcan_globalFilterConfig.anfe = 0x3U;
gMcan_globalFilterConfig.anfs = 0x3U;
}
if(NULL != stdIdFilter)
{
gMcan_stdFiltelem.sfid2 = stdIdFilter->sfid2;
gMcan_stdFiltelem.sfid1 = stdIdFilter->sfid1;
gMcan_stdFiltelem.sfec = stdIdFilter->sfec;
gMcan_stdFiltelem.sft = stdIdFilter->sft;
}
else
{
/* id 0x65 and 0x6C is set by default for filtering */
gMcan_stdFiltelem.sfid2 = 0x760U;
gMcan_stdFiltelem.sfid1 = 0x65U;
gMcan_stdFiltelem.sfec = 0x2U;
gMcan_stdFiltelem.sft = 0x2U;
}
if(NULL != extIdFilter)
{
gMcan_extIdFiltelem.efid1 = extIdFilter->efid1;
gMcan_extIdFiltelem.efid2 = extIdFilter->efid2;
gMcan_extIdFiltelem.efec = extIdFilter->efec;
gMcan_extIdFiltelem.eft = extIdFilter->eft;
}
else
{
/* id 02 is set by default for filtering */
gMcan_extIdFiltelem.efid1 = 0x1FFFFF60U;
gMcan_extIdFiltelem.efid2 = 0x65U;
gMcan_extIdFiltelem.efec = 0x2U;
gMcan_extIdFiltelem.eft = 0x2U;
}
}
/*******************************************************************************
* Function Name : getRxEventHandle
*
* Service Id : NA
*
* Description : Get the Rx event handle
*
* PreConditions :
*
* Parameters : NA
*
* Called functions :
*
* Global Data : mcanRxQueueEvent
*
* Return Value : MCAN Rx event Handle address
*
*******************************************************************************/
Event_Handle* getRxEventHandle()
{
return &mcanRxQueueEvent;
}
/*******************************************************************************
* Function Name : getMsgQueueHandle
*
* Service Id : NA
*
* Description : Get the Message Queue handle
*
* PreConditions :
*
* Parameters : NA
*
* Called functions :
*
* Global Data : rxMsgQueueHandle
*
* Return Value : MCAN Rx Message Queue Handle address
*
*******************************************************************************/
Utils_QueHandle* getMsgQueueHandle()
{
return &rxMsgQueueHandle;
}
/*******************************************************************************
* Function Name : Utils_mcanDeInit
*
* Service Id : NA
*
* Description : de-init of MCAN
*
* PreConditions :
*
* Parameters : NA
*
* Called functions : Event_post
*
* Global Data : mcanRxEvent, mcanRxQueueEvent
*
* Return Value : NA
*
*******************************************************************************/
void Utils_mcanDeInit()
{
Event_post(mcanRxEvent,UTILS_MCAN_RX_EXIT_EVENT);
Event_post(mcanRxQueueEvent,UTILS_MCAN_RX_QUEUE_EXIT_EVENT);
}
Regards,
Bikash
Hi Rishabh,
I have attached Screen shot for MCAN Interrupt enable register:
Regards,
Bikash
Hi Bikash,
You need to use BSP OSAL API BspOsal_irqXbarConnect or BspOsal_irqXbarConnectIrq for crossbar connection and not CSL API.
Please see pdk/packages/ti/drv/vps/include/osal/bsp_osal.h.
You can grep these API calls in Vision SDK in case you face any issues.
Regards,
Rishabh
Bikash,
Can you share only the interrupt code that you used with OSAL API.
Regards,
Rishabh
Hi Rishabh,
Below are the macros defined to map A15 interrupts:
#define MCAN_INT_TX_A15 (67U)
#define MCAN_INT_RX_A15 (68U)
#define MCAN_ECC_INT_A15 (122U)
#define MCAN_TS_INT_A15 (123U)
#define MCAN_INT_TX (MCAN_INT_TX_A15)
#define MCAN_INT_RX (MCAN_INT_RX_A15)
#define MCAN_ECC_INT (MCAN_ECC_INT_A15)
#define MCAN_TS_INT (MCAN_TS_INT_A15)
#define XBAR_INTR_TX_SOURCE (CSL_XBAR_MCAN_IRQ_INT0)
#define XBAR_INTR_RX_SOURCE (CSL_XBAR_MCAN_IRQ_INT1)
#define XBAR_INTR_ECC_SOURCE (CSL_XBAR_MCAN_IRQ_PARITY)
#define XBAR_INTR_TS_SOURCE (CSL_XBAR_MCAN_IRQ_TS)
In the below code you can see I am connecting mcan interrupt sources to A15 interrupt lines.
I am registering my ISR calls and enabling interrupts.
BspOsal_irqXbarConnectIrq(MCAN_INT_TX, MCAN_IRQ_INT0);
BspOsal_irqXbarConnectIrq(MCAN_INT_RX, MCAN_IRQ_INT1);
BspOsal_irqXbarConnectIrq(MCAN_ECC_INT, MCAN_IRQ_ECC);
BspOsal_irqXbarConnectIrq(MCAN_TS_INT, MCAN_IRQ_TS);
/* Disabling the global interrupts */
cookie = Hwi_disable();
BspOsal_IntrHandle hndlIntr0 = NULL;
BspOsal_IntrHandle hndlIntr1 = NULL;
BspOsal_IntrHandle hndlIntrECC = NULL;
BspOsal_IntrHandle hndlIntrTS = NULL;
hndlIntr0 = BspOsal_registerIntr(MCAN_INT_TX,
(BspOsal_IntrFuncPtr)mcanTxISR,
0U
);
hndlIntr1 = BspOsal_registerIntr(MCAN_INT_RX,
(BspOsal_IntrFuncPtr)mcanRxISR,
0U
);
hndlIntrECC = BspOsal_registerIntr(MCAN_ECC_INT,
(BspOsal_IntrFuncPtr)mcanECCISR,
0U
);
hndlIntrTS = BspOsal_registerIntr(MCAN_TS_INT,
(BspOsal_IntrFuncPtr)mcanTSISR,
0U
);
if( (hndlIntr0 == NULL) || (hndlIntr1 == NULL) || (hndlIntrECC == NULL) || (hndlIntrTS == NULL))
{
Vps_printf(" UTILS: MCAN INTERRUPT: BspOsal_registerIntr Failed !!!\n");
UTILS_assert(0);
}
/* Enable the interrupt */
Hwi_enableInterrupt(MCAN_INT_TX);
Hwi_enableInterrupt(MCAN_INT_RX);
Hwi_enableInterrupt(MCAN_ECC_INT);
Hwi_enableInterrupt(MCAN_TS_INT );
/* Restore interrupts */
Hwi_restore(cookie);
Regards,
Bikash
Hi Bikash,
In API call BspOsal_irqXbarConnectIrq(MCAN_INT_TX, MCAN_IRQ_INT0), what is MCAN_IRQ_INT0?
Assuming it is a macro for CSL_XBAR_MCAN_IRQ_INT0, can you check value of register CTRL_CORE_MPU_IRQ_66_67 (0x4A002AC4)?
Regards,
Rishabh
HI Rishabh,
The interrupt issue is resolved.
Lucas and vivek supported for this.
In gic for A15 core first 32 bits are reserved for private peripheral interrupts so for SPI(shared peripheral interrupts) we need to add 32 to actual interrupt no for registering the ISR.
Regards,
Bikash
Hi Bikash,
Thanks for the confirmation.
I am closing this thread.
Regards,
Rishabh