Tool/software: TI-RTOS
I have a custom board with C6748 DSP/TIRTOS.
I've tried to init USB 2.0 port but never succeeded so far.
Here's my initialization code for USB 2.0.
void Init_USB(void)
{
Uint16 i;
// BOARD UNLOCK
sysRegs->KICK0R = 0x83e70b13; // Write Access Key 0
sysRegs->KICK1R = 0x95A4F1E0; // Write Access Key 1
//sysRegs->PINMUX9 |= (0x1 << 4); // Set bit4 Pinmux9 for USB Use
//sysRegs->PINMUX9&= 0xFFFFFF7F; // Clear bit 7 Pinmux9 for USB Use
/* CONFIGURE THE DRVVBUS PIN HERE.*/
/* See your device-specific System Reference Guide for more informationon how to set up the pinmux.*/
CSL_FINST(sysRegs->PINMUX9, SYSCFG_PINMUX9_PINMUX9_7_4, USB0_DRVVBUS);
// Reset the USB controller:
usbRegs->CTRLR|= 0x00000001;
// Wait until controller is finished with Reset.
// When done, it will clear the RESET bit field.
while((usbRegs->CTRLR& 0x1) == 1);
// RESET: Hold PHY in Reset
sysRegs->CFGCHIP2 |= 0x00008000; // Hold PHY in Reset
// Drive Reset for few clock cycles
for (i=0;i<50; i++); sysRegs->CFGCHIP2&= 0xFFFF7FFF;// Release PHY from Reset
/* Configure PHY with the Desired Operation*/
// OTGMODE
sysRegs->CFGCHIP2&= 0xFFFF9FFF;// 00=> Do Not OverridePHY Values
// PHYPWDN
sysRegs->CFGCHIP2&= 0xFFFFFBFF;// 1/0 => PowerdDown/NormalOperation
// OTGPWRDN
sysRegs->CFGCHIP2&= 0xFFFFFDFF;// 1/0 => PowerDown/NormalOperation
// DATAPOL
sysRegs->CFGCHIP2|= 0x00000100;// 1/0 => Normal/Reversed
// SESNDEN
sysRegs->CFGCHIP2|= 0x00000020;// 1/0 => NormalOperation/SessionEnd
// VBDTCTEN
sysRegs->CFGCHIP2|= 0x00000010;// 1/0 => VBUS Comparator Enable/Disable
/* Configure PHY PLL use and Select Source*/
// REF_FREQ[3:0]
sysRegs->CFGCHIP2|= 0x00000002;// 0010b=> 24MHzInputSource
// USB2PHY CLK MUX: Select External Source
sysRegs->CFGCHIP2&= 0xFFFFF7FF;// 1/0 => Internal/External(Pin)
// PHY_PLLON: On Simulation PHY PLL is OFF
sysRegs->CFGCHIP2|= 0x00000040;
// Wait Until PHY Clock is Good.
while((sysRegs->CFGCHIP2& 0x00020000)== 0);
#ifndef HS_ENABLE
// Disable high-speed
CSL_FINS(usbRegs->POWER, USB_OTG_POWER_HSEN, 0);
#else
// Enable high-speed
CSL_FINS(usbRegs->POWER, USB_OTG_POWER_HSEN, 1);
#endif
// Enable Interrupts
// Enable interrupts in OTG block
usbRegs->CTRLR&= 0xFFFFFFF7;
// Enable PDR2.0 Interrupt
usbRegs->INTRTXE= 0x1F;
// Enable All Core Tx Endpoints Interrupts + EP0 Tx/Rx interrupt
usbRegs->INTRRXE= 0x1E;
// Enable All Core Rx Endpoints Interrupts
// Enable all interrupts in OTG block
usbRegs->INTMSKSETR= 0x01FF1E1F;
// Enableall USB interruptsin MUSBMHDRC
usbRegs->INTRUSBE= 0xFF;
// Enable SUSPENDM so that suspend can be seen UTMI signal
CSL_FINS(usbRegs->POWER,USB_OTG_POWER_ENSUSPM,1);
// Clear all pending interrupts
usbRegs->INTCLRR= usbRegs->INTSRCR;
// Start a session in "HOST" Mode.
CSL_FINS(usbRegs->DEVCTL, USB_OTG_DEVCTL_SESSION, 1);
}
After above steps, I run the following inside another task.
void usbTask(void)
{
USB_Params usb_host_params;
USB_Handle usb_handle;
int rc;
usb_host_params.usbMode = USB_HOST_MSC_MODE;
usb_host_params.instanceNo = USB_INSTANCE;
usb_handle = USB_open(usb_host_params.instanceNo, &usb_host_params);
if (usb_handle == 0) while(1);
// Setup the INT Controller
usbHostIntrConfig (&usb_host_params);
//Initialize the file system.
FATFS_init();
//Open an instance of the mass storage class driver.
g_ulMSCInstance = USBHMSCDriveOpen(usb_host_params.instanceNo, 0, MSCCallback);
while(1) {
rc = USBHCDMain(USB_INSTANCE, g_ulMSCInstance);
if (rc != 0)
{
while(1);
}
if(g_eState == STATE_DEVICE_ENUM) <--------------- NEVER HAPPENS
{
/*
* Take it easy on the Mass storage device if it is slow to
* start up after connecting.
*/
if(USBHMSCDriveReady(g_ulMSCInstance) != 0)
{
/*
* Wait about 100ms before attempting to check if the
* device is ready again.
*/
usb_osalDelayMs(100);
}
if (!g_fsHasOpened)
{
/* USBMSC FATFS initialization */
rc = FATFS_open(0U, NULL, &fatfsHandle);
if (rc == FR_OK) g_fsHasOpened = 1;
}
}
/* only do this when the device is already enummerated. */
FSShellAppUtilsProcess();
}
}
}
It never does STATE_DEVICE_ENUM. Do you see anything wrong in the code? I was refering to the page 81 in
