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RTOS/66AK2G12: K2G12 arm interrupt issue

Victor Wang
Prodigy 240 points
Part Number: 66AK2G12

Tool/software: TI-RTOS

Hi TI experts,

I create a uart_test application based on  pdk_k2g_1_0_10 CSL code, and I generate 4 test case in this code:

define UART_TEST_CASE1         /* Only open uart0  interrupt  and direct connect to arm*/

//#define UART_TEST_CASE2         /* Only open uart1  interrupt and dierect connect to arm */

//#define UART_TEST_CASE3         /* open both uart0 and uart1 interrupt  and both direct connect to arm */

//#define UART_TEST_CASE4         /* open uart0 interrupt and direct connect to arm,  open Uart1 interrupt  and route to CIC then to arm  */

This code can be build and run on ccs, when it run, open the Hyper Terminal and touch character on the keyboard, there will display:

“Uart0:a” or “Uart1:a”

There is some problem on the arm interrupt, and my test results was:

UART_TEST_CASE1: arm uart0 interrupt normal.

UART_TEST_CASE2: arm uart1 interrupt normal.

UART_TEST_CASE3: arm uart0 interrupt didn’t happen,  arm uart1 interrupt normal.

UART_TEST_CASE4: arm uart0 and uart1 interrupt normal.

Please help to check the attached code and find out it is firmware issue or chip issue.

Thanks

Victor2352.Uart_Test.zip

 

  • 0
    Prodigy 240 points

    Part Number: 66AK2G12

    Tool/software: TI-RTOS

    TI experts,

    We will use K2G as the processor for our new product .
    During the development, we found there are some issues on K2G arm interrupt.
    Here is our development enviroment:
    1. Our software is based on TI pdk_k2g_1_0_10，we didn't use OS.
    2. EvmK2g board, Our own board based on K2g12.
    3. CCS Version: 7.4.0.00015

    The issues is:
    1. When uart0 and uart1's interrupt opened at the same time, Arm can not detect uart0's interrupt,
       I check uart0's register, the interrupt flag had been set, but arm's gic-400's interrupt pending flag
       didn't set at all, It seems that arm's gic-400 do not receive uart0's interrupt.
      
       If I open uart0 or uart1's interrupt independently, Arm can receive the interrupt correctly.
      
       I try to connect uart1's interrupt to cic then route to arm and uart0's interrupt directly connect to arm,
       in this case, arm can receive uart0 and uart1's interrupt correctly.

    2. I test timer's interrupt, I create 3 timer, it is timer2, timer3, and timer4, and connect the interrupt to
       arm-gic400 directly, arm can recevive all these timer's interrupt correctly.
      
       Then I connect these 3 timer to cic, then route to arm-gic, If I slecet cic out channel to: 1,2,3 and connect to
       arm-gic, arm can not receive the timer's interrupt,  but if i select cic out channel to: 1, 10, 20 and connect to
       arm-gic, arm can receive the timer's interrupt. also i checked the cic interrupt flag, it had been set, but arm's gic-400's
       interrupt pending flag didn't set at all, arm-gic400 didn't receive the interrupt.
      
    Please help to explain this issue, thanks.

  • 0
    TI__Guru** 116170 points

    Victor,

    Are you using UART driver from Processor SDK RTOS for this effort. The UART driver that we use can work in both RTOS and bare-metal mode and is design to use OS Abstraction layer to configure the GIC setting.  

    We are not tasked to support custom driver development as it is difficult for use to debug and reproduce issues that we don`t have access to. 

    Regards,

    Rahul

  • 0 in reply to Rahul Prabhu
    Prodigy 240 points

    Rahul,


    Thanks for your reply!


    Our driver build up based on PDK CSL, include UART driver and GIC configuration. In general, it is consistent with TI RTOS.

    Can you help to check "When uart0 and uart1's interrupt directly connect to arm-gic and opened at the same time, if arm-gic could receive uart0 or uart1's interrupt correctly? "

    Regards

    Victor

  • 0
    Prodigy 70 points

    Hi TI expert,

    This is related to https://e2e.ti.com/support/processors/f/791/p/812588/3008097#3008097 . We did not get help on that thread. Basically, we want to know the process of enabling interrupts to both uart0 and uart1. When both are enabled, one of them did not receive interrupt.

    Please help on reviewing the code.

    Thanks,

    Li

    510 933 7224

    Molex LLC

    Fremont, CA 46360

  • 0 in reply to Li Wang1
    TI__Guru**** 161600 points

    Hi,

    It would be useful to share how you configure the UART registers as well as the CIC registers for mapping the UART IRQ to the ARM, because as far as I understand this is a test case for custom board, which we cannot test on K2G EVM.

    Best Regards,
    Yordan

  • 0 in reply to Yordan Kovachev
    Prodigy 240 points

    Hi Yordan,

    The test code is independed with special board, it can be loaded and run on K2G EVM。

    The detail configuration about Uart and CIC as follow:

    #if  defined (UART_TEST_CASE1) || defined (UART_TEST_CASE3) || defined (UART_TEST_CASE4)
        stUartCfg.ucDataBit  = WORDL_8BITS;
        stUartCfg.ucParity   = PARITY_NONE;
        stUartCfg.ucStopBit  = STOP_BITS_1;
        stUartCfg.ulBandRate = BAUD_RATE115200;
        stUartCfg.bRouteCIC  = FALSE;  //Means route by cic or not.
        stUartCfg.stCIC.ulMuxInEvt  = 0; // If route by cic, cic input event id.
        stUartCfg.stCIC.ulMuxOutEvt = 0;//if route by cic, cic output channel.
        stUartCfg.stCorepac.ulEvtId   = (CSL_ARM_GIC_UART_0_UARTINT + 32) ; //arm gic-400， input spi event。
        stUartCfg.stCorepac.ulIntChnl = 0x20;
        stUartCfg.pfnUartRxIsrCb = __Uart0Isr;
        Drv_UartInit(UART_PORT0, &stUartCfg);
    #endif

    #if defined (UART_TEST_CASE2) || defined (UART_TEST_CASE3)
        stUartCfg.ucDataBit  = WORDL_8BITS;
        stUartCfg.ucParity   = PARITY_NONE;
        stUartCfg.ucStopBit  = STOP_BITS_1;
        stUartCfg.ulBandRate = BAUD_RATE115200;
        stUartCfg.bRouteCIC  = FALSE;
        stUartCfg.stCIC.ulMuxInEvt  = 0;
        stUartCfg.stCIC.ulMuxOutEvt = 0;
        stUartCfg.stCorepac.ulEvtId   = (CSL_ARM_GIC_UART_1_UARTINT + 32) ;
        stUartCfg.stCorepac.ulIntChnl = 0x20;
        stUartCfg.pfnUartRxIsrCb = __Uart1Isr;
        Drv_UartInit(UART_PORT1, &stUartCfg);
    #endif

    #if  defined (UART_TEST_CASE4)
        stUartCfg.ucDataBit  = WORDL_8BITS;
        stUartCfg.ucParity   = PARITY_NONE;
        stUartCfg.ucStopBit  = STOP_BITS_1;
        stUartCfg.ulBandRate = BAUD_RATE115200;
        stUartCfg.bRouteCIC  = TRUE;
        stUartCfg.stCIC.ulMuxInEvt  = CSL_CIC_UART_1_UARTINT;
        stUartCfg.stCIC.ulMuxOutEvt = 0;
        stUartCfg.stCorepac.ulEvtId   = (stUartCfg.stCIC.ulMuxOutEvt + 368) ;
        stUartCfg.stCorepac.ulIntChnl = 0x20;
        stUartCfg.pfnUartRxIsrCb = __Uart1Isr;
        Drv_UartInit(UART_PORT1, &stUartCfg);
    #endif

    The detail register value about uart, cic, arm-gic, you can check in ccs registers.

    Regards

    Victor

  • 0 in reply to Victor Wang
    TI__Guru** 116170 points

    Victor,

    Sorry for the delay in getting to this thread. I will try to setup the test case on the K2G EVM and try to provide guidance here however as I indicated since this is a custom driver, it will take us longer than if you were using Processor SDK RTOS UART driver which has been tested to work with multiple instances.

    At first glance it appears that you are not using Processor SDK RTOS OS Abstraction layer(OSAL) which provide the hooks for setting up CIC and GIC events as I have explained in the thread here 

    https://e2e.ti.com/support/processors/f/791/t/816724

    For K2G bare-metal ARM interrupt setup, you can also look at Edma and MCASP Interrupt setup:

    pdk_k2g_1_0_xx\packages\ti\board\diag\mcasp_audiodc\src\mcasp_audiodc_test.c

    Regards,

    Rahul

  • 0 in reply to Rahul Prabhu
    Prodigy 240 points

    Rahul,

    Thanks  for your reply!

    Our CIC and GIC driver is setup up based on CSL library, it is reference to OSAL, The process flow  are consistent with OSAL.

    I checked the mcasp_audiodc_test.c the file, it based on interrupt.c

    #ifdef _TMS320C6X
    #include <ti/csl/arch/c67x/interrupt.h>
    #else
    #include <ti/csl/arch/arm9/interrupt.h>
    #endif

    I think it is not suitable for k2G(cortex-a15).

    The arm interrupts don't occur on some special cases that I had mentioned, Other cases they are working fine.

    That's make me confused , and I need your help。

    Regards

    Victor

     

  • 0 in reply to Victor Wang
    TI__Guru** 116170 points

    Victor,

    I was able to set up the code in my environment and build the code but need some instructions on how you are able to run the code on the K2G EVM platform. I observed that you are setting up UART0 and UART1 but we only expose UART2 and UART0 pins on the EVM through connectors J49 and J23. Can you please provide instructions on how to set this up on the EVM to generate interrupts for both UART instances.

    Moreover, I observe that your custom code doesn`t use any of the PDK components other than CSL. The code sets up pinmux, clock as well as interrupt using bare-metal code instead of relying on board library or OSAL components. This is not a typical scenario. We only support application development that is using TI software components as you can see from the guidelines that we have provided here:

    http://processors.wiki.ti.com/index.php/Checklist_for_Processor_SDK_RTOS_questions_on_E2E

    Supporting custom driver setups and development is difficult and not a way in which we can scale our support across broad base of customers so please anticipate delays.  I will try to consult a ARM GIC expert early next week and try to provide guidance.

    Regards,

    Rahul

  • 0 in reply to Rahul Prabhu
    Prodigy 240 points

    Rahul,

    Thanks for your great support!

    In EVM board, I also can't test uart1, but I can config uart0 and uart1 both to work use the macro" UART_TEST_CASE3", we can observe that uart0 don't work.

    In Our in-house board, uart0 and uart1 both connect to the connector. when use  the macro" UART_TEST_CASE3", we can observe that uart0 don't work and uart1 work fine.

    So you can help to check in EVM board, why uart0 don't work when use the macro" UART_TEST_CASE3"?

    Regards

    Victor

  • 0 in reply to Victor Wang
    Prodigy 70 points

    Hi Rahul,

    I am attaching the project in zipped file. 

    The testing code is simple, in CCS, compile the application, load the application and run in the EVM board. the ARM could not get any uart0’s interrupt, would you please us figure it out why?

    Thank you very much for your help,

    Li

     

    P.S. the zip file:

    UartTest.zip

     

    The main.c in the zip is as follows,

    /**************************************************************************************************/
    /* Includes                                                                                       */
    /**************************************************************************************************/
    #include <string.h>
    #include <stdio.h>

    #include <ti/csl/csl_device_interrupt.h>


    #include "Drv_CorepacInt.h"
    #include "Drv_CIC.h"
    #include "Drv_Uart.h"
    /**************************************************************************************************/
    /* Macro Define                                                                                   */
    /**************************************************************************************************/

    /**************************************************************************************************/
    /* Enum Define                                                                                    */
    /**************************************************************************************************/


    /**************************************************************************************************/
    /* Structure Define                                                                               */
    /**************************************************************************************************/


    /**************************************************************************************************/
    /* Constant Define                                                                                */
    /**************************************************************************************************/


    /**************************************************************************************************/
    /* Variable Define                                                                                */
    /**************************************************************************************************/


    /**************************************************************************************************/
    /* Local Function Declare                                                                         */
    /**************************************************************************************************/


    /**************************************************************************************************/
    /* Local Function Define                                                                          */
    /**************************************************************************************************/

    void __Uart0Isr(uint8_t ucData)
    {
        char acBuf[16];

     memset(acBuf, 0, sizeof(acBuf));
     sprintf(acBuf, "Uart0:%c\r\n", ucData);
     Drv_UartPuts(UART_PORT0, (uint8_t *)acBuf, strlen(acBuf));
    }


    void __Uart1Isr(uint8_t ucData)
    {
        char acBuf[16];

     memset(acBuf, 0, sizeof(acBuf));
     sprintf(acBuf, "Uart1:%c\r\n", ucData);
     Drv_UartPuts(UART_PORT1, (uint8_t *)acBuf, strlen(acBuf));
    }


    /**************************************************************************************************/
    /* Global Function Define                                                                         */
    /**************************************************************************************************/

    int main()
    {   
        STUartCfgPara    stUartCfg;

     Drv_CorepacIntInit();

        stUartCfg.ucDataBit  = WORDL_8BITS;
        stUartCfg.ucParity   = PARITY_NONE;
        stUartCfg.ucStopBit  = STOP_BITS_1;
        stUartCfg.ulBandRate = BAUD_RATE115200;
        stUartCfg.bRouteCIC  = FALSE;
        stUartCfg.stCIC.ulMuxInEvt  = 0;
        stUartCfg.stCIC.ulMuxOutEvt = 0;
        stUartCfg.stCorepac.ulEvtId   = (CSL_ARM_GIC_UART_0_UARTINT + 32) ;
        stUartCfg.stCorepac.ulIntChnl = 0x20;
        stUartCfg.pfnUartRxIsrCb = __Uart0Isr;
        Drv_UartInit(UART_PORT0, &stUartCfg);

        stUartCfg.ucDataBit  = WORDL_8BITS;
        stUartCfg.ucParity   = PARITY_NONE;
        stUartCfg.ucStopBit  = STOP_BITS_1;
        stUartCfg.ulBandRate = BAUD_RATE115200;
        stUartCfg.bRouteCIC  = FALSE;
        stUartCfg.stCIC.ulMuxInEvt  = 0;
        stUartCfg.stCIC.ulMuxOutEvt = 0;
        stUartCfg.stCorepac.ulEvtId   = (CSL_ARM_GIC_UART_1_UARTINT + 32) ;
        stUartCfg.stCorepac.ulIntChnl = 0x20;
        stUartCfg.pfnUartRxIsrCb = __Uart1Isr;
        Drv_UartInit(UART_PORT1, &stUartCfg);

         while(1)
         {
             asm("   NOP");
      }
    }

     

     

  • 0 in reply to Li Wang1
    Prodigy 70 points

    Would you please help us figure out why? :)

  • 0 in reply to Li Wang1
    TI__Guru** 116170 points

    Li, 

    I have been trying to debug your code using K2G EVM platform and have been comparing the TI UART driver interrupt setup with your driver but there are a few issues with your code. 

    If I enable TEST1 or TEST3 that should output on the K2G debug UART, there is no data observed on the serial console on the host with either test cases. Our evaluation platform uses the same T1 and T4 pins as your board so I expected the binary to work. Have you tested this code on the TI evaluation platform?

    Your code doesn`t use board library where we have consolidated approach to configuring PSC/Pinmux etc which makes things easy to follow. If case of your code, we need to go and validate every SOC register configuration impact UART which is time consuming.  This is reason why it is not reasonable for us to  support custom driver development on a custom platform.

    Thus far I have been able to check that the Pinmux, PSC and UART registers are set correctly and the CSL for interrupt setup (using CSL_armGicConfigIntr) gets called the same way as TI UART driver.

    Custom UART setup with CSL_armGicConfigIntr 

    UART configuration


    ARM interrupt configuration 


    TI UART driver on K2G EVM:


    Can you please try to provide clear instructions on how we can reproduce this on the K2G EVM. Given the base code doesn`t print anything on UART0, I am not sure if the driver code is functional with one instance of UART on the TI HW platform.

    Regards,

    Rahul

  • 0 in reply to Rahul Prabhu
    Prodigy 70 points

    Hi Rahul,

    Thank you very much for your help. Attached please find what we tested and how the tests were done.

    Uart0_test_instruction.docx

    Thanks,

    Li

  • 0 in reply to Li Wang1
    Prodigy 70 points

    Hi Rahul,

    Any finding now? we are still waiting for your response and help. 

    Thanks,

    Li

  • 0 in reply to Li Wang1
    TI__Guru** 116170 points

    Li Wang,

    As indicated earlier, we are not able support this custom development as this relates to supporting development of custom drivers for a interface where TI provides software drivers. Additionally your code doesn`t use any TI tools or software beyond register and functional level CSL. We have reached out to design to check if they have any guidance on the A15 GIC setup but the GIC validation expert is out this week so I don`t have any new update to share. 

    We have multiple customers who have successfully used multiple UARTs using TI RTOS UART driver so you can refer to TI driver code and GIC configuration for debugging this issue and development of your driver. I will try to revive this setup at my end and get the GIC design expert to look at this issue and get back to you by early next week. 

    Regards,

    Rahul

  • 0 in reply to Rahul Prabhu
    Prodigy 70 points

    Hi Rahul,

    We are still waiting as you mentioned to get the GIC design expert to look at this issue. Any feedback from the GIC design expert? Hope we can get more help from you.

    Thank you very much for your support!

    Li

  • 0 in reply to Li Wang1
    TI__Guru** 116170 points

    Victor,

    Do you have any updates to share on this issue. We still have not got anything conclusive from our GIC expert on the design team regarding this issue. 

    I will ping them again early next week and try to get see if I can provide further guidance 

    Regards,

    Rahul