Dear Experts,
could You please help with a clarification on EDMA3 transfer completion indication, which is manually triggered and used in a non-interrupt fashion --> polling.
Basically the question is, whether it is enough to use the "EDMA3_DRV_checkAndClearTcc()" function as confirmation, that EDMA3 transfer was successful?
Maybe there are other events, interrupts, arbitrations, which could abort an on-going EDMA3 transfer impacting IPRH bit and thus it seems, that transfer is complete, while actually there was an error or similar ...
I assume enabling and handling the error interrupts and error status registers mentioned in the KeyStone Architecture EDMA3 Controller Users Guide in addition to above "EDMA3_DRV_checkAndClearTcc()" function should be enough or are there any other conditions/situations to consider?
Many thanks and best regards,
Gregor